Noise invariant circuits, systems and methods

Details Noise invariant circuits, systems and methods Noise invariant circuits, systems and methods

2005-09-27

2005-09-27

Ngo, Chuong D (Department: 2193)

Electrical computers: arithmetic processing and calculating

Electrical digital calculating computer

Particular function performed

C707S620000, C707S628000

Reexamination Certificate

active

06950840

ABSTRACT:
The electrical circuitry for a multiplier system includes a counter for determining proximity to sampling operation, and a switch to select between symmetrical noise invariant operation and a low-power mode of operation. A noise invariant circuit disables row skip operation in a multi-row multiplier, to enable analog sampling. Disabling of the row skip operation is accomplished at a time which is several digital cycles preceding the time of analog sampling. Power saving multiplier row skippage resumes after analog sampling is completed.

REFERENCES:
patent: 5200912 (1993-04-01), Asghar et al.
patent: 5677849 (1997-10-01), Smith
patent: 5787029 (1998-07-01), de Angel
patent: 6065032 (2000-05-01), Nicol
patent: 6604120 (2003-08-01), De Angel

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