Noise insensitive comparator

Communications: electrical – Digital comparator systems

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328147, H03K 5153, H03K 524

Patent

active

044183321

ABSTRACT:
A noise insensitive comparator is disclosed which includes an output circuit, such as a bistable flip-flop, which is triggerable to provide an indication and an output control circuit which responds to the first and second signals which are to be compared for triggering the output circuit in accordance therewith. The output control circuit triggers the output circuit to provide the indication when the values of the first and second signals cross over, but only if the first and second signal values have deviated from one another by more than a selected amount since the output circuit was last triggered. This prevents erroneous retriggering of the output circuit due to noise in the first and second signals.

REFERENCES:
patent: 3668532 (1972-06-01), Potash
patent: 3955102 (1975-05-01), Chi
patent: 4157509 (1979-06-01), Zielinski
patent: 4162454 (1979-07-01), Olsen
Weinberger, "High-Speed Comparators with Offset" IBM Tech. Disclosure Bulletin vol. 23, No. 10, Mar. 1981, pp. 4600-4604.

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