Noise-free semiconductor memory device capable of disconnecting

Details Noise-free semiconductor memory device capable of disconnecting Noise-free semiconductor memory device capable of disconnecting

1992-03-26

1994-06-21

LaRoche, Eugene R.

Static information storage and retrieval

Addressing

Particular decoder or driver circuit

365203, 365206, 365207, 365208, 365190, 307449, 307463, G11C 702, G11C 800

Patent

active

053233573

ABSTRACT:
A semiconductor memory circuit according to the present invention comprises a decode circuit responsive to an internal address for generating a signal of a predetermined level, a drive circuit responsive to a word line activating signal for generating a word line selection signal corresponding to an output level of the decode circuit and a shutdown circuit responsive to a control signal for disconnecting the decode circuit from a ground terminal.
With this construction, since the decode circuit is disconnected from the ground terminal during a time period for which a memory sense amplifier operates, an output level of the word line selection signal is not affected by noise even if the latter is generated on the ground line during that period. Therefore, it is possible to keep the memory cell in a stable selection state.

REFERENCES:
patent: 4048629 (1977-09-01), Bormann
patent: 4200917 (1980-04-01), Moench
patent: 4259731 (1981-03-01), Moench
patent: 4275312 (1981-06-01), Saitou et al.
patent: 4620299 (1986-10-01), Remington et al.
patent: 4651031 (1987-03-01), Kamuro
patent: 4827160 (1989-05-01), Okano
patent: 5245583 (1993-09-01), Li et al.
patent: 5262687 (1993-11-01), Benhamida

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