Electricity: measuring and testing – Impedance – admittance or other quantities representative of... – Lumped type parameters
Reexamination Certificate
2002-07-25
2004-02-24
Nolan, Jr., Charles H. (Department: 2834)
Electricity: measuring and testing
Impedance, admittance or other quantities representative of...
Lumped type parameters
C324S1540PB
Reexamination Certificate
active
06696845
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for a circuit for evaluating signal versus noise level as an evaluating reference in an evaluating apparatus such as an IC tester for evaluating electric performance of an IC (Integral Circuit). Particularly, the present invention relates to a noise evaluation circuit for an IC tester such as a mixed signal tester for analyzing an integral circuit in which an analog circuit and a digital circuit exist together therein.
2. Description of Related Art
Recently, an IC (Integral Circuit) is used in various aspects, and an IC is used for analyzing electrical and operating characteristics and a root cause of failure of an IC.
FIG. 5
is a view for explaining a theory of an analyzing an apparatus such as an IC tester for a semiconductor integrated circuit (IC).
An entire IC tester comprises a section in which a measuring circuit
14
such as a test head
12
is mounted, a section in which a processing circuit
15
such as an IC tester unit
11
for performing a processing of analysis result in a test for a device under test (hereinafter called “DUT”)
17
to be analyzed, and a computer
13
for controlling an entire IC tester.
A DUT
17
to be analyzed is mounted on an evaluation board
16
in the above-mentioned IC tester, and electric and operating characteristics are analyzed by an measuring circuit
14
.
It is necessary to understand noise analysis performance of an IC tester in analyzing a DUT
17
to be analyzed on an evaluation board
16
in a mounted position in advance so as to analyze signal versus noise level characteristics of an IC.
In particular, it is important to analyze signal versus noise level characteristics in analyzing a DUT having a circuit in which a digital circuit and an analog circuit such as an A/D (analog/digital) convertor and a D/A (digital/analog) converter exist together.
However, in a conventional IC tester, there has been a problem in that it is not possible to analyze signal versus noise level characteristics accurately because it is not possible to measure noise measuring performance (noise figure F) of an IC tester quantitatively in a mounted position of a DUT
17
to be analyzed on an evaluation board
16
.
SUMMARY OF THE INVENTION
The present invention is made in consideration of the above problem. An object of the present invention is to provide a noise evaluating circuit for an IC tester in which noise analysis characteristics for a DUT
17
in a mounted position on an evaluation board
16
can be measured quantitatively.
A first aspect of a noise evaluation circuit for an IC tester according to the present invention is characterized in evaluating the noise level of an IC tester which analyzes electrical and operating characteristics of a DUT such as an IC to be analyzed. A noise evaluation circuit for an IC tester according to the present invention comprises mounts a reference resistor which generates thermal noise (for example, a reference resistor
1
), a reference noise generator which generates reference noise electricity which is calibrated (for example, a reference noise generating circuit
2
), a summing circuit which adds the electricity of the thermal noise to the reference noise electricity (for example, switches
120
to
122
), an amplifying circuit which amplifies result of the calculation in the summing circuit (for example, an amplifier
3
), and a switch which is disposed between the reference noise generator and the summing circuit, on an evaluation board which evaluates and element to be analyzed. A noise evaluation circuit for an IC tester according to the present invention determines noise figure F according to three electricity values such as two kinds of electrical value which are output from the above-mentioned amplifying circuit by switching on and off and electrical value of the reference noise electricity.
A second aspect of a noise evaluation circuit for an IC tester according to the present invention is characterized in that a summing circuit outputs sum of noise electricity and electricity of thermal noise to an amplifying circuit when a switch is in an on-state and outputs an electrical value of only electricity of thermal noise to the amplifying circuit when the switch is an in off-state.
A third aspect of a noise evaluation circuit for an IC tester according to the present invention is characterized in that amplification ratio of an amplifying circuit is determined by an amplified value of summed result of reference noise electricity which is output from an amplifying circuit when a switch is in an on-state and electricity of a thermal noise and an amplified value of only electricity of the thermal noise which is output from the amplifying circuit when the switch is in an off-state, and calculates noise figure F according to the amplification ratio and the reference noise electricity.
A fourth aspect of a noise evaluation circuit for an IC tester according to the present invention is characterized in that a reference noise generator comprises a resistor and a plurality of amplifiers which amplify thermal noise of the resistor.
A fifth aspect of a noise evaluation circuit for an IC tester according to the present invention is characterized in that a switch comprises a plurality of switch and outputs output from a plurality of amplifier via each resistor.
A sixth aspect of a noise evaluation circuit for an IC tester according to the present invention is characterized in that a summing circuit comprises a WiredOR.
A seventh aspect of a noise evaluation circuit for an IC tester according to the present invention is characterized in that a reference resistor is disposed near a DUT to be evaluated.
A eighth aspect of a noise evaluation circuit for an IC tester according to the present invention is characterized in that an amplifying circuit is disposed near a reference resistor.
According to the present invention, by mounting a noise evaluation circuit on an evaluation board and calibrating a noise evaluation circuit on an evaluation board in advance, it is possible to measure noise figure F without receiving influence of accuracy of calibrated value from a measuring circuit of an IC tester.
REFERENCES:
patent: 5668507 (1997-09-01), Boerstler et al.
patent: 6269328 (2001-07-01), Hirano
patent: 2002/0017912 (2002-02-01), Tamaki et al.
patent: 135869 (1985-04-01), None
patent: 07294594 (1995-11-01), None
Ando Electric Co., Ltd. (Japanese)
Darby & Darby
Nolan, Jr. Charles H.
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