Noise elimination circuit

Details Noise elimination circuit Noise elimination circuit

1975-04-21

1977-03-15

Zazworsky, John

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307264, 328165, 328169, 178DIG12, 357 23, 357 34, H03K 508

Patent

active

040126439

ABSTRACT:
A noise elimination circuit utilizing a novel four-terminal semiconductor device having an emitter-grounded current amplification factor which rises steeply from a low point to a constant level portion. The input signal which contains desirable signal portions and undesirable noise portions are applied to both the base and the gate of the four-terminal device. The four-terminal device is biased at its gate in such a manner that the desirable signal portions are positioned in the vicinity of the constant level segments of the emitter-grounded current amplification factor, and the high level portions or undesirable portions of the signal are positioned in such a manner to be at the low point on the emitter-grounded current amplification characteristic whereby the desired signal is left unchanged and the undesirable signal is greatly reduced in amplitude at the output of the system.

REFERENCES:
patent: 3204160 (1965-08-01), Sah
patent: 3268658 (1966-08-01), Schroeder
patent: 3289009 (1966-11-01), Gruodis

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