Noise detection circuit

Demodulators – Amplitude modulation demodulator – Having specific distortion – noise or other interference...

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329122, 328141, H03K 1332, H03K 520

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active

041952642

ABSTRACT:
Digital noise detection circuit for detecting the presence of noise in digital diphase data and for producing an alarm signal in response to the detection of such noise. The digital diphase data is applied to circuitry from which a clock signal is extracted and processed to derive a first input signal at a first input of an alarm NAND logic gate. The clock signal is also employed by a digital phase lock loop circuit to produce a second signal at a second input of the alarm NAND logic gate which, in the absence of noise corrupting or otherwise affecting the diphase data, is out of phase with the signal at the first input of the alarm NAND logic gate. As a result, no alarm signal is produced by the alarm NAND logic gate. At such time as the diphase data is affected by noise, the signal at the first input of the alarm NAND logic gate becomes in phase with the signal produced by the phase lock loop circuit at the second input of the alarm NAND logic gate, resulting in the production of an alarm signal by the alarm NAND logic gate. The alarm signal may be employed in any desired manner by circuitry associated with the noise detection circuit.

REFERENCES:
patent: 3440540 (1969-04-01), Hane et al.
patent: 4052676 (1977-10-01), Crittenden
patent: 4080576 (1978-03-01), Huber et al.

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