Multiplex communications – Diagnostic testing – Fault detection
Reexamination Certificate
1999-05-21
2004-10-05
Ton, Dang (Department: 2666)
Multiplex communications
Diagnostic testing
Fault detection
C370S216000, C370S246000, C370S395200, C370S401000
Reexamination Certificate
active
06801504
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a node device of an ATM (Asynchronous Transfer Mode) communication network and a method of a failure alarm notification.
This invention is based on Patent Application No. Hei 10-172106 filed in Japan, the content of which is incorporated herein by reference.
2. Background Art
Specifications for an OAM (Operation, Administration, and Maintenance) processing is generally used in an ATM communication network for an ATM level failure alarm notification, and the processing steps are provided in ITU-T Rec.I610 “B-ISDN Operation and Maintenance Principals and Function”.
FIG. 1
is a schematic diagram showing a relationship between the lines of the ATM communication network and the connections. In the figure, the reference numeral
101
indicates a SDH (Synchronous Digital Hierarchy) line,
102
and
103
indicate VP
1
(first virtual path) and VP
2
(second virtual path), respectively, which are both multiplexed with the SDH
101
, and
104
and
105
indicate connections VC
1
(first Virtual connection) and VC
2
(second Virtual Connection), respectively, which are multiplexed with VP
1
and VP
2
, respectively.
When a failure occurs in the SDH line
101
, a VP-AIS (Alarm Indication Signal) is sent downstream to respective VPs which are multiplexed with the SDH
101
. At the end point of the VPC (Virtual Path Connection), the VC-AIS is sent downstream to each VC (Virtual Connection), which is multiplexed with each VP.
Referring to
FIG. 1
, when a failure occurs in the SDH line
101
, the VP-AIS is sent to VP
1
102
and VP
2
103
, respectively, which are multiplexed with SDH
101
.
At the end point of the VPC, the VC-AIS is sent to VC
1
104
and VC
2
105
, respectively, which are multiplexed with VP
1
102
and VP
2
103
.
At the end point of VPC, the VP-AIS is terminated, and the VP-RDI (Remote Defect Indication) is sent to the end point of the opposite VP.
Similarly, the VC-AIS is terminated at the end point of VCC, and the VC-RDI is sent to the end point of the opposing VC.
FIG. 2
is a block diagram showing VCs (Virtual Connection) from the sending side VC user to the receiving side VC user. The reference numeral
202
indicates the sending side VC user, VCX
1
;
203
indicates a sending side node, VPX
1
;
204
indicates a relay node, VPX
2
;
205
indicates a receiving side node, VPX
3
; and
206
indicates a receiving side VC user, VCX
2
. A virtual connection VCC
216
connects from the sending side VC user, VCX
1
202
, to the receiving side VC user VCX
2
206
, and the virtual connection
216
is multiplexed with the virtual path VPC
215
in between the sending side node VPX
1
203
and the receiving side node VPX
3
205
.
Hereinafter, a case will be described when a failure
201
occurs at a position in a VP indicated by a mark X, which is located between the node VPX
1
203
and the node VPX
2
204
, as shown in FIG.
2
.
When the failure is detected at the relay node VPX
2
204
located downstream from the position of the failure, the relay node VPX
2
204
sends a signal VP-AIS
207
down stream from the node. Since the receiving side node VPX
3
205
that has received VP-AIS
207
is the end point of the VPC
215
in which the failure occured, the VP-AIS
207
is terminated at the node
205
and VP-RDI
210
is sent upstream to the opposite VP which forms a pair with the VP in which the failure occured. The receiving side node VPX
3
205
sends VC-AIS
208
down stream to the VC which is multiplexed with the failed VP for notifying the failure alarm.
The receiving side VC user VCX
2
206
, which is multiplexed with the failed VP and which is the end point of the VC, terminates the received VC-AIS
208
, and sends VC-RDI
209
upstream from the device to another VC which forms a pair of the VC which received the failure signal. The VPX
3
205
, VPX
2
204
, and VPX
1
203
send VC-RDI
209
as it is supplied from the VCX
2
206
to the VCX
1
202
upstream.
Since VPX
1
203
is the end point of the VPC
215
, the VPX
1
203
terminates the VP-RDI
212
sent from the VPX
3
205
. By receiving and terminating the VP-RDI
212
, the VPX
1
203
can recognize the position of the failure marked by X.
Since VCX
1
202
is the end point of VCC
216
, it receives and terminates VC-RDI
214
sent from the VCX
2
206
.
In order to carry out the above described processing, respective nodes shown in
FIG. 2
are constructed as shown in
FIG. 3
or in FIG.
4
.
FIG. 3
is a diagram showing structures of the relay nodes VPX
2
204
in
FIG. 2
, which is comprised of line processing interfaces (
301
-
1
,
301
-
2
, . . . ,
301
-k,
301
-N, only
301
-
1
and
301
-n are shown in the figure), provided for respective lines (numbers of lines are
1
,
2
, . . . , k, . . . , N), an ATM switch
302
, and a processor
303
.
The line processing interfaces for respective lines are the same and a line processing interface
301
-
1
will be described. The line processing interface
301
-
1
is provided with a line receiving portion
311
-
1
which terminates the line, a failure notifying portion
312
-
1
for notifying that the failure in a line has been detected, a header converting portion
313
-
1
for converting a header of received data (cell), a header conversion table
314
-
1
, which stores notifications for replacing the header, and which is referred to by the header converting portion, a cell inserting portion
315
-
1
for inserting a cell to communicate the failure notice, and a line sending portion
316
-
1
.
When the line receiving portion
311
-
1
of the line processing interface
301
-
1
detects an LOS (Loss Of Signal), the failure notice portion
312
-
1
is informed about this detection, and the cell insertion portion
315
-
1
prepares for inserting the VP-AIS cell.
An address of the VP-AIS cell is determined by the header conversion portion
313
-
1
, and the address is added to the header of the VP-AIS cell as VPIs (VP identifiers). The VP-AIS cell, to which the address is added, is input into the ATM switch
302
from the cell inserting portion
315
-
1
.
FIG. 4
is a block diagram showing the structure of a node which is the end point of the VPC, such as the receiving side node VPX
3
205
shown in
FIG. 2
, and which is comprised of line processing interfaces
401
-
1
,
402
-
1
, . . . ,
401
-k, . . . ,
401
-N provided for respective lines
1
,
2
, . . . , k, . . . , N, an ATM switch
402
, and a processor
403
.
Since the line processing interfaces for respective lines have the same structure, the structure of the line processing interface is explained using the first line processing interface
401
-
1
. The first line processing interface
401
-
1
comprises the line receiving portion
411
-
1
which terminates the line, a failure notifying portion
412
-
1
for notifying that a failure has been detected in a line, a header converting portion
413
-
1
which renews the header of the received data (cell), a header conversion table
414
-
1
which stores data for renewing data and which is referred by the header converting portion
413
-
1
, an upstream cell inserting portion
415
-
1
for inserting a cell for communicating the failure notice, a cell inserting portion
416
-
1
, and a line transmitting portion
417
-
1
.
When the LOS is detected at the line receiving portion
411
-
1
of the line processing interface
401
-
1
, the detected signal is communicated to the failure notifying portion
412
-
1
, and the cell inserting portion
412
-
1
prepares for inserting the VC-AIS cell as the end-point of the VP in response to an instruction from the failure notifying portion
412
-
1
.
The address of the VC-AIS cell is determined by the header converting portion
413
-
1
and the result is added to the header of the VC-AIS as the VPI/VCI (VP Identifier/VC Identifier).
The VC-AIS to which the address has been added is input to an ATM switch
402
from the cell inserting portion
415
-
1
.
Since this node is the end point of the VP, a preparation for inserting the VP-RDI cell is performed by the cell in
Hom Shick
NEC Corporation
Ton Dang
Whitham Curtis & Christofferson, P.C.
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