Multiplex communications – Data flow congestion prevention or control – Control of data admission to the network
Reexamination Certificate
2005-09-26
2010-06-08
Moe, Aung S (Department: 2474)
Multiplex communications
Data flow congestion prevention or control
Control of data admission to the network
C370S229000, C370S235000, C370S412000, C719S313000, C719S317000, C235S380000, C235S439000
Reexamination Certificate
active
07733771
ABSTRACT:
A data processing method in a network on chip formed of a plurality of processors configured to communicate between one another, and at least one network controller configured to initialize communications in the network, the method including: receiving and storing in a memory by a first processor, one or more credit management configuration programs received from the network controller, and establishing a first communication between at least said first processor and at least one second processor.
REFERENCES:
patent: 4970506 (1990-11-01), Sakaida et al.
patent: 5845148 (1998-12-01), Ichikawa et al.
patent: 5909565 (1999-06-01), Morikawa et al.
patent: 7032005 (2006-04-01), Mathon et al.
patent: 2003/0167335 (2003-09-01), Alexander
patent: 2003/0223444 (2003-12-01), Lambrecht
patent: 2004/0131076 (2004-07-01), Smith
patent: 2005/0044190 (2005-02-01), Kawada et al.
patent: 2006/0041889 (2006-02-01), Radulescu et al.
patent: WO 03/065236 (2003-08-01), None
Andrei Radulescu, et al., “An Efficient On-Chip Network Interface Offering Guaranteed Services, Shared-Memory Abstraction, and Flexible Network Configuration”, proceedings of the Design, Automation and Test in Europe Conference and Exhibition, Feb. 16, 2004, pp. 1-6.
Andrei Radulescu, et al., “Communication Services for Networks on Chip”, SAMOS, II, 2002, pp. 275-299.
Simon Moore, et al., “Point to Point GALS Interconnect”, Proceedings of the Eighth International Symposium on Asynchronous Circuits and Systems, 2002, 7 pages.
E. Rijpkema, et al., “Trade-offs in the design of a router with both guaranteed and best-effort services for networks on chip”, IEE Proc.-Comput. Digit. Tech., vol. 150, No. 5, Sep. 2003, pp. 294-302.
Khalid M. Al-Tawil, et al., “A Survey and Comparison of Wormhole Routing Techniques in Mesh Networks”, IEEE Network, Mar./Apr. 1997, pp. 38-45.
Nilanjan Banerjee, et al., “A Power and Performance Model for Network-on-Chip Architectures”, Proceedings of the Design, Automation and Test in Europe Conference and Exhibition, 2004, 6 pages.
Evgeny Bolotin, et al., “Cost considerations in network on chip”, Elsevier, Integration, the VLSI journal vol. 38, 2004, pp. 19-42.
Xiaola Lin, et al., “The Message Flow Model for Routing in Wormhole-Routed Networks”, IEEE Transactions on Parallel and Distributed Systems, vol. 6, No. 7, Jul. 1995, pp. 755-760.
John Bainbridge, et al. “Chain: A Delay-Insensitive Chip Area Interconnect”, IEEE Micro, 2002, pp. 16-23.
A. Bystrov, et al., “Priority Arbiters”, IEEE, 2000, pp. 128-137.
Christopher J. Glass, et al., “The Turn Model for Adaptive Routing”, ACM, 1992, pp. 278-287.
Tomaz Felicijan, et al., “An Asynchronous On-Chip Network Router with Quality-of-Service (QoS) Support”, IEEE, 2004, pp. 274-277.
Tomaz Felicijan, et al., “Quality of Service (QoS) for Asynchronous On-Chip Networks”, 7 pages.
Bernard Christian
Clermidy Fabien
Lattard Didier
Varreau Didier
Commissariat a l''Energie Atomique
Javaid Jamal
Moe Aung S
Oblon, Spivak McClelland, Maier & Neustadt, L.L.P.
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