Nitride trapping memory device and method for reading the same

Details Nitride trapping memory device and method for reading the same Nitride trapping memory device and method for reading the same

2007-11-28

2008-08-12

Zarabian, A. (Department: 2827)

Static information storage and retrieval

Floating gate

Particular biasing

C365S094000, C365S102000, C365S185200, C365S185280, C365S185290

Reexamination Certificate

active

07411833

ABSTRACT:
A nitride trapping memory device includes a comparator, a bias unit, a memory cell, a cycling cell, a compensation cell and a control unit. The comparator has a reference voltage. The bias unit is for outputting a bias voltage to the comparator, and the comparator outputs a bit value according to comparison of the bias voltage and the reference voltage. The memory cell is connected to the bias unit via a first switch. The cycling cell is connected to the bias unit via a second switch. The compensation cell is connected to the bias unit via a third switch. The control unit is for controlling the cycling cell and the compensation cell according to the bit value.

REFERENCES:
patent: 4122546 (1978-10-01), von Basse et al.

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