Nitride read-only memory cell and nitride read-only memory...

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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C365S185300, C365S218000

Reexamination Certificate

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07830723

ABSTRACT:
A NROM memory device includes an array of memory cells and first and second bit lines. The first and second bit lines are coupled to opposite sides of the memory cells. During an erase operation, one of the sides of the memory cells receives a positive voltage and the other side couples to a common node or a limited current source. Methods are also disclosed that can easily screen for marginal memory cells based on a threshold voltage distribution of the memory cells.

REFERENCES:
patent: 6633496 (2003-10-01), Maayan et al.
patent: 6704217 (2004-03-01), Eitan

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