Next line prediction apparatus for a pipelined computed system

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395375, 395200, 395250, 395800, 3642802, 3642803, 3642434, 36424341, 3642443, 3642472, 3642475, 3642581, 3642613, 3642624, 3642628, 3642629, 3642631, 3642758, 364DIG1, 364DIG2, G06F 934, G06F 938, G06F 940

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052838730

ABSTRACT:
A next line prediction mechanism for predicting a next instruction index to an instruction cache of a computer pipeline, has a latency equal to the cycle time of the instruction cache to maximize the instruction bandwidth out of the instruction cache. The instruction cache outputs a block of instructions with each fetch initiated by a next instruction index provided by the line prediction mechanism. The instructions of the block are processed in parallel for instruction decode and branch prediction to maintain a high rate of instruction flow through the pipeline.

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