Neutralization of trapped charge in a charge accumulation...

Active solid-state devices (e.g. – transistors – solid-state diode – With means to control surface effects

Reexamination Certificate

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C257S349000, C257S355000, C257S356000, C257S357000, C257S632000, C257S649000, C257S650000, C257S651000, C257SE27112

Reexamination Certificate

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08035200

ABSTRACT:
A semiconductor structure. The semiconductor structure includes a semiconductor layer, a charge accumulation layer on top of the semiconductor layer, a doped region in direct physical contact with the semiconductor layer; and a device layer on and in direct physical contact with the charge accumulation layer. The charge accumulation layer includes trapped charges of a first sign. The doped region and the semiconductor layer forms a P−N junction diode. The P−N junction diode includes free charges of a second sign opposite to the first sign. The trapped charge in the charge accumulation layer exceeds a preset limit above which semiconductor structure is configured to malfunction. A first voltage is applied to the doped region. A second voltage is applied to the semiconductor layer. A third voltage is applied to the device layer. The third voltage exceeds the first voltage and the second voltage.

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