Neural network system and circuit for use therein

Details Neural network system and circuit for use therein Neural network system and circuit for use therein

1988-12-22

1991-02-19

MacDonald, Allen R.

Boots, shoes, and leggings

307201, G06F 1518

Patent

active

049949829

ABSTRACT:
A neural network system comprises a memory for storing in binary code the synaptic coefficients indicative of the interconnections among the neurons. Means are provided for simultaneously supplying all the synaptic coefficients associated with a given neuron. Digital multipliers are provided for determining the product of the supplied synaptic coefficients and the relevant neuron states of the neurons connected to said given neuron. The multipliers deliver their results into an adder tree for determining the sum of the products. As a result of the parallel architecture of the system high operating speeds are attainable. The modular architecture enables extension of the system.

REFERENCES:
patent: 4193115 (1980-03-01), Albus
patent: 4773024 (1988-09-01), Faggin et al.
S. C. J. Garth, "A Chipset for High Speed Simulation of Neural Network Systems", IEEE Conf. Neural Networks, San Diego III-433-452 (1987).
S. White "Architecture for a Digital Programmable Image Processing Element", ICASSP '81, 3/30-4/1/81, vol. 1, pp. 658-661.

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