Neural network processing system using semiconductor memories

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

307201, G06F 1518

Patent

active

051650096

ABSTRACT:
Herein disclosed is a data processing system having a memory packaged therein for realizing a large-scale and high-speed parallel distributed processing and, especially, a data processing system for the neural network processing. The neural network processing system according to the present invention comprises: a memory circuit for storing neuron output values, connection weights, the desired values of outputs, and data necessary for learning; and input/output circuit for writing or reading data in or out of said memory circuit; a processing circuit for performing a processing for determining the neuron outputs such as the product, sum and nonlinear conversion of the data stored in said memory circuit, a comparison of the output value and its desired value, and a processing necessary for learning; and a control circuit for controlling the operations of said memory circuit, said input/output circuit and said processing circuit. The processing circuit is constructed to include at least one of an adder, a multiplier, a nonlinear transfer function circuit and a comparator so that at least a portion of the processing necessary for determining the neutron output values such as the product or sum may be accomplished in parallel. Moreover, these circuits are shared among a plurality of neutrons and are operated in a time sharing manner to determine the plural neuron output values. Still moreover, the aforementioned comparator compares the neuron output value determined and the desired value of the otuput in parallel.

REFERENCES:
patent: 4611299 (1986-09-01), Hori et al.
patent: 4974169 (1990-11-01), Engel
patent: 4994982 (1991-02-01), Duranton et al.
Suzuki et al., "A Study of Regular Architectures for Digital Implementation of Neural Networks", 1989 IEEE Internatl. Symposium on Circuits and Systems, 5/8-11/89, pp. 82-85.
Advanced Micro Devices, Memory Products Data Book, Jan. 1989, pp. 4-80-4-81.
Eberhardt et al., "Design of 3 Parallel Hardware Neural Network Systems from Custom Analog-VLSI `Building Block` Chips", Internat. Joint Conf. on Neural Networks, 6/18-22/89, pp. II-183-II-190.
Holler et al., "An Electrically Trainable Artificial Neural Network (ETANN) with 10240 `Floating Gate` SYNAPSES", Proc. Internat. Annual Conf. on Neural Networks, 1989, pp. 50-55.
Terrence J. Sejnowski, et al., "Parallel Networks that Learn to Pronounce English Text", Complex Systems 1, (1987), pp. 145-168.
"Neural Network Processing" (Chapter 2), published by Sangyo Tosho and edited by Hideki Asou, pp. 39-68.
"Neural Network Processing" (Chapter 3), published by Sangyo Tosho and edited by Hideki Asou, pp. 69-93 and 118-123.
David E. Rumelhart, et al., "Learning Representations by Back-Propagating Errors", Nature vol. 323, Oct. 9, 1986, pp. 533-536.
Nikkei Microdevices, Mar. 1989, pp. 123-129.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Neural network processing system using semiconductor memories does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Neural network processing system using semiconductor memories, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Neural network processing system using semiconductor memories will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-1178038

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.