Electrical computers and digital processing systems: multicomput – Network-to-computer interfacing
Reexamination Certificate
1999-04-13
2003-03-04
El-Hady, Nabil (Department: 2154)
Electrical computers and digital processing systems: multicomput
Network-to-computer interfacing
C709S230000, C709S231000, C709S232000, C709S238000, C710S065000, C710S071000
Reexamination Certificate
active
06529961
ABSTRACT:
TECHNICAL FIELD
The present invention relates to network interfacing, and more particularly to a novel network transceiver having a Media Independent Interface (MII) operable in a General Purpose Serial Interface (GPSI) mode.
BACKGROUND ART
A Local Area Network, or (LAN), is a communication system that provides a connection among a number of independent computing stations within a small area, such as a single building or group of adjacent buildings. One type of network structure uses one or more repeaters in a star topology, with each repeater having several ports. A data packet received at one port is retransmitted to all other ports of the repeater. Each repeater in turn restores timing and amplitude degradation of data packets received at one port and retransmits the packets to all other ports.
Traditional Ethernet networks (10BASE-T) operate at 10 Mb/s Ethernet protocol, as described by IEEE Standard 802.3; the majority of Ethernet interfaces currently operate at this data rate. However, a newer Ethernet standard, under IEEE standard 802.3u, accomplishes the faster operation of 100 BASE-T systems, at a 100 Mb/s data rate (i.e., a 125 Mb/s encoded bit rate) using unshielded twisted pair (UTP) physical media. The 100 BASE-T standard defines operation over two pairs of category 5 UTP (100 BASE-TX) or category 3 UTP. The 100 BASE-FX network medium, covered by the 100 BASE-T standard, allows operation over dual fiber optic cabling.
Ethernet protocol provides for a Media Access Control (MAC), enabling network interface devices at each network node to share accesses to the network medium. One type of connection, termed a Media Independent Interface, or MII, connects the MAC to a physical layer (PHY) transceiver configured for a particular network medium, e.g., 10 BASE-T, 100 BASE-FX, or 100 BASE-TX. The physical layer transceiver is configured for converting the MII protocol signals output by the MAC into analog network signals, such as Multiple Layer Transition-3 (MLT-3) signals for 100 Mb/s Ethernet networks, or Manchester-encoded signals for 10Mb/s Ethernet networks.
As defined in the IEEE 802.3 standard, the MII supports a parallel MAC interface to the PHY device. A serial interface such as the IEEE 802.3 compliant General Purpose Serial Interface (GPSI) is required to support a serial MAC interface to the PHY device. Thus, to be able to communicate via parallel and serial MAC interfaces, the PHY transceiver needs separate MII and GPSI pins. However, it would be desirable to reduce the pin count of the PHY transceiver by using MII for supporting not only a parallel MAC interface but also a serial MAC interface.
DISCLOSURE OF THE INVENTION
The invention provides a novel network transceiver for transferring network signals between a media access control (MAC) device and a link partner in a local area network, such as one conforming to Ethemet/IEEE 802.3 Standard.
The transceiver comprises a physical layer device, a parallel interface for connecting the physical layer device and the MAC device, and a circuit for enabling the parallel interface to operate in a serial interface mode to transfer a serial data stream. For example, the transceiver may be integrated on a single chip.
In accordance with one aspect of the invention, the parallel interface is a media independent interface (MII) conforming to IEEE Std. 802.3u. The enabling circuit allows the MII to operate as a General Purpose Serial Interface (GPSI).
Preferably, the physical layer device includes first and second data rate paths selected based on a rate of data communication with the link partner. The first data rate path generates the corresponding network signals at 100 Mb/s, and the second data rate path generates the corresponding network signals at 10 Mb/s.
The enabling circuit places the MII into the GPSI mode only for 10 Mb/s data.
A serial mode select signal is asserted to enable the MII to operate in the GPSI mode.
Various objects and features of the present invention will become more readily apparent to those skilled in the art from the following description of specific embodiment thereof, especially when taken in conjunction with the accompanying drawings.
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Advanced Micro Devices , Inc.
El-Hady Nabil
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