Network router integrated onto a silicon chip

Details Network router integrated onto a silicon chip Network router integrated onto a silicon chip

2008-01-29

2008-01-29

Chan, Wing (Department: 2616)

Multiplex communications

Channel assignment techniques

Using time slots

Reexamination Certificate

active

10043968

ABSTRACT:
A router is integrated onto a single silicon chip and includes an internal bus that couples multiple data receive and transmit channels to a central processing unit. The channels each have an external interface for connecting to different LAN or WAN networks. The serial channels are convertible into one or more time division multiplexed (TDM) channels. A time slot assigner (TSA) assembles and disassembles data packets transferred in TDM formats, such as ISDN. The serial channels are used for separately processing data packets in each TDM time slot. The TSA is programmable to operate with different TDM formats. A single direct memory access controller (DMAC) is coupled to each serial channel and an Ethernet channel and conducts data transfers on the internal router bus through a common port. The DMAC uses a novel bus protocol that provides selectable bandwidth allocation for each channel. The router architecture includes different interface circuitry which is also integrated onto the silicon chip. The interface circuitry includes user definable input/output (I/O) pins with programmable pulse width detection. The user definable I/O provides synchronous and asynchronous interfacing to peripheral devices with different timing constraints. The interface circuitry also includes a DRAM controller having a programmable timing control circuit that operates with memory devices having different timing and memory block sizes.

REFERENCES:
patent: 4803485 (1989-02-01), Rypinski
patent: 5005170 (1991-04-01), Nelson
patent: 5229994 (1993-07-01), Balzano et al.
patent: 5598408 (1997-01-01), Nickolls et al.
patent: 5640399 (1997-06-01), Rostoker et al.
patent: 5663961 (1997-09-01), McRoberts et al.
patent: 5668809 (1997-09-01), Rostoker et al.
patent: 5675829 (1997-10-01), Oskouy et al.
patent: 5708659 (1998-01-01), Rostoker et al.
patent: 5726985 (1998-03-01), Daniel et al.
patent: 5796735 (1998-08-01), Miller et al.
patent: 5982749 (1999-11-01), Daniel et al.
patent: 5991817 (1999-11-01), Rowett et al.
patent: 6026443 (2000-02-01), Oskouy et al.
Article from FastForward, Dec. 1993,Three Applications That Are Possible Only With 500K Technology, pp. 8, 9 and 12.
Motorola MC68360 Quad Integrated Communication Controller Product Brief, copyright 1993, pp. 1-14.
Motorola M68360QUADS-040 User's Manual, Issue 1.0, Aug. 16, 1993, pp. 1-86.
Motorola MC68360 Quad Integrated Communications Controller User's Manual, Dec. 4, 1996.
Article from FastForward, Dec. 1993,Three Applications that are Possible only with 500K Technology, pp. 8, 9 and 12.
Motorola MC68360 Quad Integrated Communication Controller Product Brief, copyright 1993, pp. 1-14.
Motorola M68360QUADS-040 User's Manual, Issue 1.0, Aug. 16, 1993, pp. 1-86.

Affiliated with

Also associated with

Rating

Network router integrated onto a silicon chip does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Network router integrated onto a silicon chip, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Network router integrated onto a silicon chip will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3954908