Network interface architecture for a packet switch communication

Details Network interface architecture for a packet switch communication Network interface architecture for a packet switch communication

1993-12-13

1996-06-04

Olms, Douglas W.

Multiplex communications

Wide area network

Packet switching

370 941, H04L 1240

Patent

active

055240070

ABSTRACT:
An improved network interface architecture for a packet switch provides for the combination of both voice and data in a single switch using a common packet structure. It allows for the dynamic allocation of bandwidth based on system loading. This includes not only bandwidth within the voice or data areas of the frame, but also between the voice and data portions. The network interface (NI) provides a mechanism (the NI-Bus) of passing all packets through the Network Interface or allowing the packet devices to directly transfer packets between one another. The bandwidth allocation can easily be changed because the control and data memories are synchronized to one another. The network interface architecture, according to the invention, allows for the data packets and the control of bandwidth allocation to be controlled by a single switching device. It synchronizes the transfer of the data and the allocation of bus bandwidth. The control of the packet devices can be controlled at a very high bit rate such as, for example, 40 Mbps. It also allows packet devices to directly transfer packets. It allows for easy re-allocation of bandwidth through the use of the NI Base Registers.

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Advanced Peripherals, IEEE 802.3 Local Area Network Guide, pp. 7-12 by National Semiconductor Corporation.

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