Negatively biasing deselected memory cells

Details Negatively biasing deselected memory cells Negatively biasing deselected memory cells

2008-01-15

2008-01-15

Le, Thong Q. (Department: 2827)

Static information storage and retrieval

Floating gate

Particular biasing

C365S230060, C365S185180

Reexamination Certificate

active

07319616

ABSTRACT:
In one embodiment, the present invention includes a method to supply a negative voltage to at least one deselected wordline of a memory array. Further, while the negative voltage is supplied to deselected wordlines, a positive voltage may be supplied to a selected wordline. The memory array may be a flash memory incorporating multi-level cell architecture, in one embodiment.

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