Negative voltage switch architecture for a nonvolatile memory

Details Negative voltage switch architecture for a nonvolatile memory Negative voltage switch architecture for a nonvolatile memory

1997-07-18

1999-11-02

Phan, Trong

Static information storage and retrieval

Floating gate

Particular connection

36518513, 36518523, 36518529, 36519533, G11C 1134

Patent

active

059782633

ABSTRACT:
A negative voltage switching circuit in a nonvolatile memory includes a switching transistor coupled to an output of the negative voltage switching circuit and a first voltage source that has a voltage level substantially lower than zero volts. A pull-up circuit is coupled to a control terminal of the switching transistor and selectively to a second voltage source having a voltage level substantially above zero volts. The pull-up circuit applies the second voltage source to the control terminal of the switching transistor when the pull-up circuit is coupled to the second voltage source such that the switching transistor does not couple the first voltage source to the output. A pull-down circuit is coupled to the first voltage source and the control terminal of the switching transistor. The pull-down circuit applies the first voltage source to the control terminal of the switching transistor when the pull-up circuit is not coupled to the second voltage source such that the switching transistor couples the first voltage source to the output.

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International Search Report dated Feb. 2, 1997 for counterpart PCT application No. PCT/US96/19687.

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