Patent
1976-06-15
1977-12-20
Miller, Jr., Stanley D.
357 13, 357 22, 357 57, 357 89, H01L 2702
Patent
active
040645258
ABSTRACT:
A pair of field-effect transistors (hereinafter referred to as FETs) of p-channel type and n-channel type, respectively, both to be electrically actuated in a depletion mode, are formed on a single semiconductor substrate, for instance, a single silicon substrate, and both sources or both drains are connected to each other, or the source of one FET and the drain of the other FET are connected to each other, whereby the pair of FETs are series-connected, and the gate electrode of each FET is connected to the drain electrode or the source electrode that is not series connected in the abovementioned way, respectively, of the other FET. When a voltage of specified range is applied across both non-series-connected electrodes, i.e., the two external terminals, the resulting voltage-current characteristic presents a so-called dynatron-type characteristic, producing a negative-resistance phenomenon over a fairly wide range of applied voltage.
Since this device is, as seen from outside as one device, a two-terminal device constituted on a single substrate, it is not only fit to be highly integrated, but also able to produce a state of virtually zero value of cut-off current. Consequently, this device can be utilized for switching, memorization, large amplitude oscillation, and other various uses.
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L. Hill et al., "Synthesis of Electronic Bistable Circuits," IEEE Trans. on Cir. Theory, Mar. 1963, pp. 25-35.
S. Ostefjells, "Neg. Res. Ckt. Using Two Compl. FETs," Proc. IEEE, vol. 53, No. 4, Apr. 1965, p. 404.
H. Lehman et al. "Form. of Depl. and Enhance mode FETs," IBM Tech. Discl. Bull., vol. 8, No. 4, Sept. 1965, pp. 675, 676.
Iwasa Hitoo
Kano Gota
Tsuda Naoyuki
Clawson Jr. Joseph E.
Matsushita Electric - Industrial Co., Ltd.
Miller, Jr. Stanley D.
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