Negative pulse edge triggered flip-flop

Details Negative pulse edge triggered flip-flop Negative pulse edge triggered flip-flop

1999-02-26

2000-12-19

Tran, Toan

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Particular stable state circuit

327208, H03K 3356

Patent

active

061631922

ABSTRACT:
A negative edge triggered flip-flop generates an output pulse in response to a negative edge of a clock signal. A first set of nodes receives data input signals, and a second set of nodes receives select input signals for selecting one data input signal as a selected data input signal. The clock node receives the clock signal which has a positive edge and a negative edge. A header circuit connects to the second set of nodes and to the clock node, and integrates the clock signal with the select input signals to generate at least one control signal. A pulse generator circuit connects to the first set of nodes, the header circuit and the output node. The pulse generator circuit generates an output pulse on the output node in response to a control signal and the selected data input signal.

REFERENCES:
patent: 5793236 (1998-08-01), Kosco
patent: 5898330 (1999-04-01), Klass
patent: 5973531 (1999-10-01), Kim et al.

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