Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – With specific source of supply or bias voltage
Reexamination Certificate
1998-12-23
2001-05-29
Wells, Kenneth B. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Specific identifiable device, circuit, or system
With specific source of supply or bias voltage
C327S537000
Reexamination Certificate
active
06239651
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to the field of integrated circuits, and, more particularly, to a device for the generation of a negative voltage level.
BACKGROUND OF THE INVENTION
There is a trend towards the reduction of supply voltage levels in integrated circuits, especially to reduce their electrical power consumption. This forces integrated circuit designers to develop appropriate technologies to reduce the levels of the threshold voltages of transistors for these transistors to operate in a sufficiently reliable manner at a lower supply voltage. This is done while maintaining or even improving the speed of operation. However, the technology used imposes limits. In one example, reference is made to 0.25 micron CMOS technology. To obtain low threshold voltages for the transistors, the nominal values |Vtp|=475 millivolts for a P-type transistor and Vtn=469 microvolts for an N-type transistor, require a total voltage of about 900 millivolts. Accordingly, there is some difficulty in operating such a device at a logic supply voltage of 1 volt or less using 0.25 micron technology.
One way of operating an integrated circuit at a low voltage or a very low voltage is to modify the characteristics of certain transistors on critical conduction paths. For this purpose, a negative voltage can be applied where a zero voltage is commonly used. In the invention, it is sought, more particularly, to switch over the zero voltages using P-type MOS transistors connected to a load line. A load line, for example, is connected to a row of dynamic memory cells.
In an example of this kind, to store a 0 in the row, a row decoder commonly switches to ground Gnd. As a first approximation, and overlooking the substrate effect, the level Gnd - Vtp is present on the row. In practice, several hundreds of millivolts are measured. If the supply voltage decreases, the operating window of the read circuit becomes too small. The period of retention in the memory thus becomes greatly reduced. The switching needs to be carried out using the most negative possible voltage. The negative voltage must be within the limit of voltages that are acceptable and compatible with known standards for achieving reliable components for the technologies used. As a result, the window of operation would be widened.
In one example using a dynamic memory, the negative voltage is to be applied to a large load, such as the row of memory cells. A negative load pump device is therefore used to provide a negative voltage at output. There are known negative load pump devices used in combination with row decoders. U.S. Pat. No. 5,168,174 describes a device of this kind. However, there are high negative voltage levels, e.g., in the range of −11 volts, used for the electrical erasure of non-volatile memories. However, these operating devices do not work at low voltages.
SUMMARY OF THE INVENTION
The present invention provides a load pump device capable of providing a negative voltage when supplied with a low voltage of 1 volt or less. The negative voltage provided can range from several hundreds of millivolts to a few volts with sufficient energy. The invention can be applied especially to integrated circuits made by MOS, CMOS or BiCMOS technology supplied with low voltage, particularly to dynamic memories.
One approach is to provide an integrated circuit device that includes a negative load pump circuit having switching MOS transistors and capacitors. According to the invention, the switching transistors are each formed in a well on the integrated circuit, and each transistor has its well contact or body connected in common to its gate and to its source to receive a phase signal. This device may have only one stage for obtaining a negative output voltage of about −1 volt from a 1-volt supply voltage Vdd.
The negative load pump device includes a pump stage with a capacitor and a switching transistor having its drain connected to the first terminal of the capacitor. The negative load pump device further includes a first inverter and a second inverter series-connected to respectively provide a first phase signal and a second phase signal from a clock signal applied to the input of the device. The first phase signal is applied to the gate of the switching transistor and the second phase signal is applied to the second terminal of the capacitor. The output of the negative load pump device is supplied by the first terminal of the capacitor. If a more negative voltage is sought at output of the pump stage, it is necessary to provide several stages.
A first embodiment of a negative load pump device with several stages according to the invention comprises only two inverters, regardless of the number of stages of the pump. The two phase signals needed for the first stage are obtained from the two inverters. One of the two phase signals needed for the following stages is generated by the previous stage.
A second embodiment of the invention comprises one inverter per stage in addition to a first inverter. This device is advantageous with respect to the stability of the output level and the efficiency of the negative load pump device, but takes up more space since there is one additional inverter per stage. Either of these devices can be selected depending on the intended application.
In another embodiment, the negative load pump device according to the invention is advantageously combined with a regulation circuit to limit the power consumption of the device when it is not used. At the same time, the supply of the negative level expected at the output is enabled on the basis of its stopping conditions, with a very short response time.
Preferably, the regulation circuit is controlled by the voltage level at output of the next to the last stage. When this level is more negative than a defined threshold, and if the pump is not activated by an external command, the pump is stopped. The voltage at the last stage is then at a high standby level. It is possible to generate the negative voltage level expected at the output at the next change in clock phase, i.e., when the clock signal is transmitted again.
Under these stopping conditions the voltage level at the last stage is closest to zero. The power consumption and leakage currents are reduced to a minimum as is the voltage stress on the transistors to which the output voltage VF of the pump is supplied. The threshold used for the comparison of the voltage level of the next to the last stage is defined to have a high standby level on the last stage. This makes it possible to obtain the negative low level at the output that is expected for the intended application. The regulation according to the invention therefore makes it possible to ensure the supply of the negative level at the output on demand.
Furthermore, on the basis of the stopping conditions, if the negative load or charge pump device is reactivated by an external command, the change in phase following the clock signal is enough to provide the negative level desired at the output for the intended application. The response time of the charge pump is thus optimum. When there is no external activation command, the pump is stopped as long as the stopping conditions are detected. This is, as long as the level on the next to the last stage is sufficiently negative and above the threshold. If this level increases due to inevitable leakages, the pump is again activated to provide a more negative level.
In another embodiment that is applicable when the negative load pump device has only one stage, the regulation circuit makes direct use of the output level VF of the pump. The regulation circuit can also be used when the pump has more than one stage. In this case, the same stopping conditions are present. It is necessary to stop the pump at the high level of the signal VF when this high level becomes smaller than a specified threshold. Here, the detection includes making a direct comparison of the voltage level VF of the last stage with this threshold. This is necessary, in addition to sampling
Allen Dyer Doppelt Milbrath & Gilchrist, P.A.
Galanthay Theodore E.
Nguyen Hai L.
STMicroelectronics S.A.
Wells Kenneth B.
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