Active solid-state devices (e.g. – transistors – solid-state diode – Responsive to non-electrical signal – Magnetic field
Reexamination Certificate
2001-11-13
2003-05-06
Flynn, Nathan J. (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Responsive to non-electrical signal
Magnetic field
C257S414000
Reexamination Certificate
active
06559511
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to semiconductor memory devices.
More particularly, the present invention relates to enhancing the magnetic field for programming semiconductor random access memory devices that utilize a magnetic field.
BACKGROUND OF THE INVENTION
A magnetoresistive random access memory (hereinafter referred to as “MRAM”) device has a structure which includes ferromagnetic layers separated by non-ferromagnetic layers. The ferromagnetic layers each have a free magnetic moment vector that can be oriented in one of several preferred directions relative to a pinned magnetic moment vector that is fixed in direction.
Unique resistance values are created by the orientation of the free magnetic moment vector relative to the pinned magnetic moment vector. These unique resistance values are used to represent stored information. Accordingly, stored information is read by detecting resistance changes of the magnetic memory device. In typical magnetic memory devices, two resistance states are available. The stored states can be read by passing a sense current through the cell in a sense line to detect the difference between the magnetic resistances of the states.
In MRAM devices, the memory cells are programmed by magnetic fields produced by a current carrying conductor such as a copper interconnect. Typically, two orthogonal interconnects are employed, with one positioned above (hereinafter referred to as the bit line) the MRAM device and the second positioned below (hereinafter referred to as the digit line) the MRAM device. The purpose of the bit and digit lines is to provide magnetic fields for programming the MRAM device.
A problem with programming a MRAM device is the large current required to produce a magnetic field of sufficient magnitude. This is especially a problem for low power applications, such as laptop computers, cell phones, pagers, and other portable electronic devices. In addition, as the magnetic memory cell is reduced in size to increase the areal density of the memory, the magnetic field required for programming of the ferromagnetic free layer must be increased to maintain the stability of the memory state against thermal fluctuations. Further, a MRAM device integrates magnetic memory elements and other circuits, for example, a control circuit for magnetic memory elements, comparators for detecting states in a magnetic memory element, input/output circuits, etc. These circuits are usually fabricated in the process of CMOS technology, which operates at low current and high efficiency, in order to lower the power consumption of the system.
In the prior art, the bit lines and digit lines are typically surrounded by a ferromagnetic cladding region to focus the magnetic field towards the MRAM device. For an uncladded conductive line, the magnetic field is given by the equation H~I/2.w, where I is the current flowing through the conductive line and w is the width of the conductive line. For simplicity of discussion, we are ignoring the magnetic field loss caused by the finite distance between the bit and the conductive line, as well as the field loss caused by the finite thickness of the conductive line. However, for a conductive line cladded on three sides, the magnetic field is given by the equation H~I/w, which is a factor of two larger than the uncladded bit line. Hence, the magnetic field of a conductive line can be increased for a given current by adding a ferromagnetic cladding region. Thus, by adding the ferromagnetic cladding region, it is possible to program MRAM devices with less current. However, further reductions in current are desired so that MRAM devices are more compatible with CMOS technology.
It would be highly advantageous, therefore, to remedy the foregoing and other deficiencies inherent in the prior art.
Accordingly, it is an object of the present invention to provide a new and improved magnetoresistive random access memory device.
It is an object of the present invention to provide a new and improved magnetoresistive random access memory device which reduces power consumption of the device.
It is a further object of the present invention to provide a new and improved magnetoresistive random access memory device which is more compatible with CMOS technology.
It is another object of the present invention to provide a new and improved magnetoresistive random access memory device which operates at currents typically produced by CMOS technology.
SUMMARY OF THE INVENTION
To achieve the objects and advantages specified above and others, a conductive line for programming a MRAM device is disclosed which includes a metal interconnect region, wherein the metal interconnect region is capable of supplying a current which produces a magnetic field. The metal interconnect region includes a metal layer with a thickness and a width and has a first side, a second side, a third side, and a fourth side wherein a ferromagnetic cladding region with a thickness is positioned on the first side, the second side, the third side, and the fourth side of the metal layer. Further, the ferromagnetic cladding region positioned on the first side has a trench having a width, g, which is less than the width, w, of the metal layer and a depth approximately equal to the thickness of the ferromagnetic cladding region. The trench within the ferromagnetic cladding region is positioned adjacent to a magnetoresistive random access memory device. The purpose of the trench is to concentrate the magnetic field proximate to the magnetoresistive random access memory device, wherein the magnetic field is increased by a factor approximately equal to w/g, the width of the metal layer divided by the width of the trench.
REFERENCES:
patent: 5075247 (1991-12-01), Matthews
patent: 5926414 (1999-07-01), McDowell et al.
patent: 2001/0050859 (2001-12-01), Schwarzl
Flynn Nathan J.
Koch Willliam E.
Motorola Inc.
Quinto Kevin
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