Active solid-state devices (e.g. – transistors – solid-state diode – Thin active physical layer which is – Heterojunction
Reexamination Certificate
1998-04-22
2002-03-19
Jackson, Jr., Jerome (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Thin active physical layer which is
Heterojunction
C257S009000, C257S028000, C205S202000, C428S606000, C428S614000, C428S629000, C428S472200
Reexamination Certificate
active
06359288
ABSTRACT:
FIELD OF THE INVENTION
This invention relates generally to nanowires and more particularly to nanowires having a diameter which is relatively small and uniform and techniques for fabrication thereof.
BACKGROUND OF THE INVENTION
As is known in the art, a nanowire refers to a wire having a diameter typically in the range of about one nanometer (nm) to about 500 nm. Nanowires are typically fabricated from a metal or a semiconductor material. When wires fabricated from metal or semiconductor materials are provided in the nanometer size range, some of the electronic and optical properties of the metal or semiconductor materials are different than the same properties of the same materials in larger sizes. Thus, in the nanometer-size range of dimensions, the physical dimensions of the materials may have a critical effect on the electronic and optical properties of the material.
Quantum confinement refers to the restriction of the electronic wave function to smaller and smaller regions of space within a particle of material referred to as the resonance cavity. Semiconductor structures in the nanometer size range exhibiting the characteristics of quantum confinement are typically referred to as zero-dimension (OD) quantum dots or more simply quantum dots when the confinement is in three dimensions. Quantum dots are provided from crystalline particles having a diameter less than about ten nanometers which are embedded within or on the surface of an organic or inorganic matrix and which exhibit quantum confinement in three directions.
Similarly, when the confinement is in one dimension, the structures are referred to as 2D quantum well superlattices or more simply “quantum wells.” Such superlattices are typically generated by the epitaxial growth of multi-layer active crystals separated by barrier layers. The 2D quantum wells have typically enhanced carrier mobility and also have characteristics such as the quantum Hall effect and quantum confined Stark effect. 2D quantum well superlattice structures also typically have magnetoresistance and thermoelectric characteristics which are enhanced relative to 3D materials. One problem with quantum well superlattices, however is that they are relatively expensive and difficult to produce and fabrication of quantum well superlattices are limited to several material systems including group IV semiconductors (such as SiGe), group III-V compounds (such as GaAs), group II-VI compounds (such as CdTe) and group IV-VI compounds (such as PbTe).
When the quantum confinement is in two dimensions, the structures are typically referred to as a one-dimensional quantum wires or more simply as quantum wires. A quantum wire thus refers to a wire having a diameter sufficiently small to cause confinement of electron gas to directions normal to the wire. Such two-dimensional (2D) quantum confinement changes the wire's electronic energy state. Thus, quantum wires have properties which are different from their three-dimensional (3D) bulk counterparts.
For example, metallic wires having a diameter of 100 nm or less have specific properties typically referred to as quantum conduction phenomena. Quantum conduction phenomena include but are not limited to: (a) survival of phase information of conduction electrons and the obviousness of the electron wave interference effect; (b) breaking of Ohm's Law and the dependence of the electrical conductivity and thermal conductivity characteristics of the wire on the configuration, diameter and length of the metal; (c) greater fluctuation of wire conductivity; (d) noises observed within the material depend upon the configuration of the sample and the positions of impurity atoms; (e) a mark surface effect is produced; and (f) visible light enters throughout the thin wire causing a decrease in conductivity.
In transport-related applications, quantum wire systems exhibit a quantum confinement characteristic which are enhanced relative to quantum well systems. It is thus desirable to fabricate quantum wire systems or more generally nanowire systems for use in transport-related applications. One problem with nanowire systems, however, is that it is relatively difficult to fabricate nanowires having a relatively small, uniform diameter and a relatively long length.
One technique for fabricating quantum wires utilizes a micro lithographic process followed by metalorganic chemical vapor deposition (MOCVD). This technique may be used to generate a single quantum wire or a row of gallium arsenide (GaAs) quantum wires embedded within a bulk aluminum arsenide (AlAs) substrate. One problem with this technique, however, is that microlithographic processes and MOCVD have been limited to GaAs and related materials. It is relatively difficult to generate an array of relatively closely spaced nanowires using conventional microlithographic techniques due to limitations in the tolerances and sizes of patterns which can be formed on masks and the MOCVD processing required to deposit the material which forms the wire. Moreover, it is desirable in some applications, to fabricate two and three dimensional arrays of nanowires in which the spacing between nanowires is relatively small.
Another problem with the lithographic-MOCVD technique is that this technique does not allow the fabrication of quantum dots or quantum wires having diameters in the 1-100 nanometer range. Moreover, this technique does not result in a degree of size uniformity of the wires suitable for practical applications.
Another approach to fabricate nanowire systems which overcomes some of the problems of the lithographic technique, involves filling naturally occurring arrays of nanochannels or pores in a substrate with a material of interest. In this approach, the substrate is used as a template. One problem the porous substrate approach is that it is relatively difficult to generate relatively long continuous wires having relatively small diameters. This is partly because as the pore diameters become small, the pores tend to branch and merge partly because of problems associated with filling relatively long pores having relatively small diameters with a desired material.
Anodic alumina and mesoporous materials, for example, each are provided having arrays of pores. The pores can be filled with an appropriate metal in a liquid state. The metal solidifies resulting in metal rods filling the pores of the substrate. Surface layers of the substrate surrounding the rods are then removed, by etching for example, to expose the ends of the metal rods. In some applications the rods can be chemically reacted to form semiconductor materials. Some substrate materials, however, such as anodic alumina are not suitable host templates for nanowires due to the lack of a systematic technique to control pore packing density, pore diameter and pore length in the anodic alumina.
Nevertheless, porous materials such as anodic alumina have been used to synthesize a variety of metal and semiconductor nanoparticles and nanowires by utilizing chemical or electrochemical processes to fill pores in the anodic alumina. Such liquid phase approaches, however, have been limited to Nickel (Ni), Paladium (Pd), Cadmium sulfide (CdS) and possibly Gold (Au) and Platinum (Pt). One problem with chemical or electrochemical processes is that success of the processes depends upon finding appropriate chemical precursors. Another problem with this approach is that it is relatively difficult to continuously fill pores having a relatively small diameter and a relatively long length e.g. a length greater than 2.75 microns.
Still another approach to providing nanowires is to utilize an anodic alumina substrate to prepare carbon nanotubes inside the pores of the anodic alumina by the carbonization of propylene vapor. One problem with such a gas phase reaction approach is that it is relatively difficult to generate dense continuous nanowires.
To overcome the problems of filling pores in a template, high pressure-high temperature material injection techniques have been used. In these techniques, a molten metal is injected int
Dresselhaus Mildred S.
Ying Jackie Y.
Zhang Lei
Zhang Zhibo
Baumeister Bradley Wm.
Jackson, Jr. Jerome
Massachusetts Institute of Technology
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