Nanotubes for integrated circuits

Active solid-state devices (e.g. – transistors – solid-state diode – Thin active physical layer which is – Heterojunction

Reexamination Certificate

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C257S020000, C257S040000, C257SE51040, C977S742000

Reexamination Certificate

active

07105851

ABSTRACT:
One or more semiconducting or conducting regions of a device such as a transistor may comprise molecular materials such as nanotubes or similar materials. Regions of a conductive alignment pattern used to align the nanotubes may be proximate to one or more ends of the nanotube. Additionally, a contact region may be proximate to each end of the nanotube to provide electrical contact to the nanotube. Nanotubes or the like may be in communication with device interconnection regions on a device substrate and may further be in communication with a package connection region on a package substrate.

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Chen et al., “Aligning single-wall carbon nanotubes with an alternating-current electric field,” Appl. Phys. Lett., Jun. 4, 2001, vol. 78, No. 23, pp. 3714-3716.
Frank G. Shi, “Advanced IC Interconnect and Packaging: Materials and Processing Issues”, Project Report 2000-01 for MICRO Project 00-088.
Jamin Ling et al., “Direct Bump-on-Copper Process for Flip Chip Technologies”, Kulicke & Soffa—Flip Chip Division, Agere Systems Inc.
R. Martel et al., “Carbon Nanotube Field-Effect Transistors and Logic Circuits”, 2000 ACM 1-58113-461-Apr. 2, 2006.

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