Stock material or miscellaneous articles – Structurally defined web or sheet – Including variation in thickness
Reexamination Certificate
2000-11-03
2003-12-30
Pyon, Harold (Department: 1772)
Stock material or miscellaneous articles
Structurally defined web or sheet
Including variation in thickness
C428S170000, C428S304400, C428S312600, C257S634000, C257S632000, C257S638000, C257S760000, C257S759000, C427S096400
Reexamination Certificate
active
06670022
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to nanoporous dielectric films and to a process for their manufacture. Such films are useful in the production of integrated circuits.
2. Description of the Prior Art
As feature sizes in the production of integrated circuits approach 0.25 &mgr;m and below, problems with interconnect RC delay, power consumption and crosstalk all become more significant. Integration of low dielectric constant (K) materials for interlevel dielectric (ILD) and intermetal dielectric (IMD) applications partially mitigate these problems but each of the material candidates having K significantly lower than currently employed dense silica suffer from disadvantages. Most low K materials developments emphasize spin-on-glasses (SOG's) and fluorinated plasma CVD (chemical vapor disposition) SiO
2
with K of >3. A number of organic and inorganic polymers have K in the range of 2.2 to 3.5, however, these suffer from a number of problems including low thermal stability, poor mechanical properties including low glass transition temperature (T), sample outgassing, and long term reliability questions.
Another approach has been to employ nanoporous silica which can have dielectric constants for bulk samples in the range of 1 to 3. Porous silica is attractive because it employs similar precursors (e.g., TEOS, tetraethoxysilane) as used for SOG's and CVD SiO
2
and because of the ability to carefully control pore size and size distribution. In addition to low dielectric constant, nanoporous silica offers other advantages for microelectronics including thermal stability up to 900° C., small pore size (<<microelectronics features), use of materials, silica and precursors (e.g., TEOS), that are widely used in the semiconductor industry, the ability to tune dielectric constant over a wide range and deposition using similar tools as employed for conventional SOG processing.
Although high porosity leads to a lower dielectric constant than corresponding dense materials, additional compositions and processes may be introduced as compared to a denser material. Materials issues include the need for having all pores significantly smaller than circuit feature sizes, the strength decrease associated with porosity, and the role of surface chemistry on dielectric constant and environmental stability. Density (or the inverse, porosity) is the key nanoporous silica parameter controlling property of importance for dielectrics. Properties of nanoporous silica may be varied over a continuous spectrum from the extremes of an air gap at a porosity of 100% to dense silica with a porosity of 0%. As density increases, dielectric constant and mechanical strength increase but the pore size decreases. This suggests that the optimum density range for semiconductor applications is not the very low densities associated with K~1 but rather, higher densities which yield higher strength and smaller pore size.
Nanoporous silica films can be fabricated by using a mixture of a solvent and a silica precursor which is deposited onto a silicon wafer by conventional methods of spincoating, dip-coating, etc. The precursor polymerizes after deposition and the resulting layer is sufficiently strong such that it does not shrink during drying. Film thickness and density/dielectric constant can be controlled independently by using a mixture of two solvents with dramatically different volatility. The more volatile solvent evaporates during and immediately after precursor deposition. The silica precursor, typically, a partially hydrolyzed and condensed product of TEOS, is polymerized by chemical and/or thermal means until it forms a gel layer. The second solvent is then removed by increasing the temperature. Assuming that no shrinkage occurs after gelation, the density/dielectric constant of the final film is fixed by the volume ratio of low volatility solvent to silica. EP patent application EP 0 775 669 A2, which is incorporated herein by reference, shows a method for producing a nanoporous silica film with uniform density throughout the film thickness. The preferred method for producing nanoporous dielectrics is through the use of sol-gel techniques whereby a sol, which is a colloidal suspension of solid particles in a liquid, transforms into a gel due to growth and interconnection of the solid particles. One theory is that through continued reactions within the sol, one or more molecules within the sol may eventually reach macroscopic dimensions so that they form a solid network which extends substantially throughout the sol. At this point, called the gel point, the substance is said to be a gel. By this definition, a gel is a substance that contains a continuous solid skeleton enclosing a continuous liquid phase. As the skeleton is porous, the term “gel” as used herein means an open-pored solid structure enclosing a pore fluid.
It would be desirable to produce a nanoporous silica with a relatively lower density, and hence lower dielectric constant, for the insulator between metal lines and a higher density, stronger, porous layer on top of the lines. In principle, this can be accomplished by performing multiple depositions using precursors with different solvent/silica ratios. However, that approach has a high cost because of the multiple deposition and drying/baking steps that must be used.
SUMMARY OF THE INVENTION
The invention provides a multidensity nanoporous dielectric coated substrate which comprises a substrate, a plurality of raised lines on the substrate, a single, monolithic nanoporous silicon containing polymer composition layer on the substrate, which layer has a first region of a graded density, high porosity, low dielectric constant, nanoporous silicon containing polymer composition positioned between the raised lines and second region of a graded density, low porosity, high dielectric constant, nanoporous silicon containing polymer composition positioned on top of the lines, wherein the difference between the average refractive index of the second region and the average refractive index of the first region ranges from about 0.03 to about 0.06.
The invention further provides a semiconductor device which comprises a substrate which comprises a substrate, a plurality of raised lines on the substrate, a single, monolithic nanoporous silicon containing polymer composition layer on the substrate, which layer has a first region of a graded density, high porosity, low dielectric constant, nanoporous silicon containing polymer composition positioned between the raised lines and second region of a graded density, low porosity, high dielectric constant, nanoporous silicon containing polymer composition positioned on top of the lines, wherein the difference between the average refractive index of the second region and the average refractive index of the first region ranges from about 0.03 to about 0.06.
The invention also provides a process for forming a multidensity nanoporous dielectric coating on a substrate having raised pattern lines which comprises
a) blending at least one alkoxysilane with a relatively high volatility solvent composition, a relatively low volatility solvent composition and optional water thus forming a mixture and causing a partial hydrolysis and partial condensation of the alkoxysilane;
b) depositing the mixture onto a substrate having a raised pattern of lines such that the mixture is positioned both between the lines and on the lines, while evaporating at least a portion of the relatively high volatility solvent composition;
c) exposing the mixture to a water vapor and a base vapor; and
d) evaporating the relatively low volatility solvent composition, thereby forming a single, monolithic nanoporous silicon containing polymer composition layer on the substrate, which layer has a first region of a graded density, high porosity, low dielectric constant, nanoporous silicon containing polymer composition positioned between the raised lines and second region of a graded density, low porosity, high dielectric constant, nanoporous si
Drage James S.
Ramos Teresa
Rodrick Kevin H.
Smith Douglas M.
Wallace Stephen
Honeywell International , Inc.
Pyon Harold
Roberts & Mercanti LLP
Simone Catherine A.
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