Nanofabrication of InAs/A1Sb heterostructures

Semiconductor device manufacturing: process – Making device or circuit emissive of nonelectrical signal – Compound semiconductor

Reexamination Certificate

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C438S172000, C438S174000, C438S718000

Reexamination Certificate

active

10725257

ABSTRACT:
A heterostructure comprising: a buffer layer; a bottom barrier layer formed on the buffer layer; a quantum well layer formed on the bottom barrier layer; a top barrier layer formed on the quantum well layer; and a p-doped cap layer formed on the top barrier layer; wherein a portion of the cap layer is etched to form conducting electrons in the quantum well layer below the etched portion of the cap layer. A method of etching comprising the steps of: providing a heterostructure; providing an etchant solution comprising acetic acid, hydrogen peroxide, and water; and contacting the etchant solution to the heterostructure to etch the heterostructure.

REFERENCES:
patent: 5349214 (1994-09-01), Tehrani et al.
patent: 5789540 (1998-08-01), Krstenansky et al.
patent: 2002/0119661 (2002-08-01), Watanabe et al.
patent: 2004/0101988 (2004-05-01), Roman et al.

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