Nano-structure memory device

Active solid-state devices (e.g. – transistors – solid-state diode – Thin active physical layer which is – Heterojunction

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257 20, 257 22, 257 24, 365174, 365182, H01L 2906, H01L 310328, H01L 310336

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active

057147663

ABSTRACT:
A memory device and memory incorporating a plurality of the memory devices is described wherein each memory device has spaced apart source and drain regions, a channel, a barrier insulating layer, a nanocrystal or a plurality of nanocrystals, a control barrier layer, and a gate electrode. The nanocrystal which may be a quantum dot, stores one electron or hole or a discrete number of electrons or holes at room temperature to provide threshold voltage shifts in excess of the thermal voltage for each change in an electron or a hole stored. The invention utilizes Coulomb blockade in electrostatically coupling one or more stored electrons or holes to a channel while avoiding in-path Coulomb-blockade controlled conduction for sensing the stored charge.

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Matsuoka et al., "Coulomb Blockade in the inversion layer of a Si metal-oxide-semiconductor field-effect transistor with a dual-gate structure", Appl. Phys. Lett. 64, 586, Jan. 1994.

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