Nano structure and method of manufacturing nano structure

Active solid-state devices (e.g. – transistors – solid-state diode – Physical configuration of semiconductor

Reexamination Certificate

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C257S496000, C257S596000

Reexamination Certificate

active

07902637

ABSTRACT:
A nano structure formed on the surface of a substrate containing Si and having a pattern of at least 2 μm in depth, in which Ga or In is contained in the surface of the pattern, and the Ga or the In has a concentration distribution that an elemental composition ratio Ga/Si or In/Si of Si and Ga or In detected by an X-ray photoelectron spectroscopy is at least 0.4 atomic percent in the depth direction of the substrate, and the maximum value of the concentration is positioned within 50 nm of the surface of the pattern.

REFERENCES:
patent: 5236547 (1993-08-01), Takahashi et al.
patent: 6998319 (2006-02-01), Tanaka et al.
patent: 58-151027 (1983-09-01), None
patent: 4-190984 (1992-07-01), None
patent: 2002-368307 (2002-12-01), None
patent: 2003/015145 (2003-02-01), None

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