NAND with back biased operation

Details NAND with back biased operation NAND with back biased operation

2010-04-30

2011-12-06

Le, Thong Q (Department: 2827)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185110, C365S185140, C365S185170, C365S185290, C365S185230

Reexamination Certificate

active

08072814

ABSTRACT:
Methods of programming, reading and erasing memory cells are disclosed. In at least one embodiment, program, sense, and erase operations in a memory are performed with back biased operation, such as to improve high voltage device isolation and cutoff in string drivers and bit line drivers, and no nodes of the circuitry are biased at zero volts.

REFERENCES:
patent: 5740102 (1998-04-01), Kawashima
patent: 6528845 (2003-03-01), Bude et al.
patent: 2002/0186591 (2002-12-01), Lee et al.
patent: 2007/0047327 (2007-03-01), Goda
patent: 2008/0025097 (2008-01-01), Aritome

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