Nand-type semiconductor memory device

Details Nand-type semiconductor memory device Nand-type semiconductor memory device

1998-05-04

2000-03-28

Mai, Son

Static information storage and retrieval

Floating gate

Particular connection

257316, G11C 1604, H01L 29788

Patent

active

060440163

ABSTRACT:
In a NAND-type memory device, an area required to form a memory array thereof can be reduced. In one NAND-type memory device 30, a bit line 32A and another bit line 32B are extended in parallel to each other. These bit lines 32A and 32B are connected via bit contacts 36A and 36B to a first memory cell 34A, and a second memory cell located adjacent to the first memory cell 34A along a word line direction. A bit contact 36A and another bit contact 36B are arranged along a diagonal line direction while intersecting the respective first and second memory cells, respectively. The bit contact 36A is employed so as to connect a drain region of the first memory cell 34A to the bit line 32A. The bit contact 36B is employed in order to connect a drain region of the second memory cell to the bit line 32B. On the opposite side of the bit contact 36A by sandwiching the first memory cell 34A, a source contact 38A for connecting a source diffusion layer to a source line is provided adjacent to the bit contact 36B. A source line 40 is formed between a control gate 42 and the bit line 32, and then is connected via another source contact 38B to a diffusion layer 44.

REFERENCES:
patent: 5031011 (1991-07-01), Aritome
patent: 5568421 (1996-10-01), Aritome
patent: 5591999 (1997-01-01), Momodomi et al.
patent: 5680347 (1997-10-01), Takeuchi et al.

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