NAND-type flash memory and NAND-type flash memory...

Details NAND-type flash memory and NAND-type flash memory... NAND-type flash memory and NAND-type flash memory...

2011-04-12

2011-04-12

Lam, David (Department: 2827)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185170, C365S189050, C365S189070

Reexamination Certificate

active

07924621

ABSTRACT:
A method of controlling a NAND-type flash memory provided with a latch circuit in which data is temporarily stored has measuring a first consumption current of the latch circuit in a first state in which the latch circuit is caused to retain first logic; measuring a second consumption current of the latch circuit in a second state in which the latch circuit is caused to retain second logic obtained by inverting the first logic; and comparing the first consumption current and the second consumption current to cause the latch circuit to retain logic corresponding to the state corresponding to a smaller one of the first consumption current and the second consumption current.

REFERENCES:
patent: 5890005 (1999-03-01), Lindholm
patent: 6877050 (2005-04-01), Kanzaki et al.
patent: 7170812 (2007-01-01), Nii
patent: 7646642 (2010-01-01), Fujito et al.
patent: 2001-021609 (2001-01-01), None
patent: 2001-325794 (2001-11-01), None
patent: 2003-249082 (2003-09-01), None
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patent: WO 01-80249 (2001-10-01), None
Japanese Office Action with English translation dated Nov. 9, 2010 in Application No. 2008-238092, 6 pages.

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