NAND flash memory with boosting

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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C365S185190, C365S185230

Reexamination Certificate

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07436709

ABSTRACT:
A floating gate memory array includes row control circuits that provide a programming voltage to a selected word line and provide a stair-like pattern of boosting voltages to unselected word lines. Boosting voltages descend with increased distance from the selected word line. Boosting voltages are increased in small increments up to their final values.

REFERENCES:
patent: 5043940 (1991-08-01), Harari
patent: 5172338 (1992-12-01), Mehrotra et al.
patent: 5570315 (1996-10-01), Tanaka et al.
patent: 5621684 (1997-04-01), Jung
patent: 5677873 (1997-10-01), Choi et al.
patent: 5715194 (1998-02-01), Hu
patent: 5774397 (1998-06-01), Endoh et al.
patent: 5793677 (1998-08-01), Hu et al.
patent: 5887145 (1999-03-01), Harari et al.
patent: 5909392 (1999-06-01), Chang et al.
patent: 5969985 (1999-10-01), Tanaka et al.
patent: 5991202 (1999-11-01), Derhacobian et al.
patent: 6044013 (2000-03-01), Tanaka et al.
patent: 6046935 (2000-04-01), Takeuchi et al.
patent: 6061270 (2000-05-01), Choi
patent: 6107658 (2000-08-01), Itoh et al.
patent: 6154391 (2000-11-01), Takeuchi et al.
patent: 6282117 (2001-08-01), Tanaka et al.
patent: 6363010 (2002-03-01), Tanaka et al.
patent: 6455889 (2002-09-01), Sakui
patent: 6456528 (2002-09-01), Chen
patent: 6493265 (2002-12-01), Satoh et al.
patent: 6512262 (2003-01-01), Watanabe
patent: 6522580 (2003-02-01), Chen et al.
patent: 6525964 (2003-02-01), Tanaka et al.
patent: 6545909 (2003-04-01), Tanaka et al.
patent: 6614688 (2003-09-01), Jeong et al.
patent: 6643188 (2003-11-01), Tanaka et al.
patent: 6717838 (2004-04-01), Hosoi
patent: 6717861 (2004-04-01), Jeong et al.
patent: 6859394 (2005-02-01), Matsunaga et al.
patent: 6859395 (2005-02-01), Matsunaga et al.
patent: 6859397 (2005-02-01), Lutze et al.
patent: 6898126 (2005-05-01), Yang et al.
patent: 6930921 (2005-08-01), Matsunaga et al.
patent: 7023739 (2006-04-01), Chen et al.
patent: 7099193 (2006-08-01), Futatsuyama
patent: 7212435 (2007-05-01), Rudeck et al.
patent: 7262996 (2007-08-01), Cheung
patent: 7286408 (2007-10-01), Higashitani
patent: 2002/0126532 (2002-09-01), Matsunaga et al.
patent: 2004/0080980 (2004-04-01), Lee
patent: 2005/0047210 (2005-03-01), Matsunaga et al.
patent: 2005/0174852 (2005-08-01), Hemink
patent: 2005/0226055 (2005-10-01), Guterman
patent: 2006/0002167 (2006-01-01), Rudeck et al.
patent: 2006/0092703 (2006-05-01), Chae et al.
patent: 2006/0133149 (2006-06-01), Chae et al.
patent: 2006/0198222 (2006-09-01), Rudeck et al.
patent: 2006/313613 (2006-11-01), None
USPTO Notice of Allowance and Fee(s) Due regarding U.S. Appl. No. 11/381,874 mailed on Jun. 12, 2007, 10 pages.
USPTO Supplemental Notice of Allowability regarding U.S. Appl. No. 11/381,874 mailed on Jun. 20, 2007, 5 pages.
International Searching Authority (EPO), “Notification of Transmittal of the International Search Report and the Written Opinion of the International Searching Authority, or the Declaration,” mailed in corresponding International Application No. PCT/US2007/067429 mailed on Nov. 5, 2007, 14 pages.
Aritome et al., “Reliability Issues of Flash Memory Cells”, Proceedings of the IEEE, New York, vol. 81, No. 5, May 1, 1993, pp. 776-788.
Brown et al., Editors, “Nonvolatile Semiconductor Memory Technology, A Comprehensive Guide to Understanding and Using NVSM Devices”, IEEE Press Series on Microelectronic Systems, (1998), 57 pages.
Cho et al., “A Dual Mode NAND Flash Memory: 1-Gb Multilevel and High-Performance 512-Mb Single-Level Modes”, IEEE Journal of Solid-State Circuits, vol. 36, No. 11, Nov. 2001, 9 pages.
Choi et al., “A Novel Booster Plate Technology in High Density NAND Flash Memories for Voltage Scaling Down and Zero Program Disturbance”, 1996 Symposium on VLSI Technology Digest of Technical Papers, 0-7803-3342-X/96/IEEE, 4 pages.
Jung et al., “A 3.3V 128MB Multi-Level NAND Flash Memory for Mass Storage Applications”, Samsung Electronics Co., Ltd., Kheung, Korea, Feb. 8, 1995, 3 pages.
Jung et al., “A 3.3-V Single Power Supply 16-Mb Nonvolatile Virtual DRAM Using a NAND Flash Memory Technology”, IEEE Journal of Solid-State Circuits, vol. 32, No. 11, Nov. 1997, 12 pages.
Jung et al., “A 117-mm23.3-V Only 128-Mb Multilevel NAND Flash Memory for Mass Storage Applications,” IEEE Journal of Solid-State Circuits, vol. 31, No. 11, Nov. 1996, 10 pages.
Kim et al., “Fast Parallel Programming of Multi-Level NAND Flash Memory Cells Using the Booster-Line Technology”, Symposium on VLSI Technology Digest of Technical Papers, (1997), 2 pages.
Nozaki et al., “A 1-Mb EEPROM with MONOS Memory Cell for Semiconductor Disk Application”, IEEE Journal of Solid-State Circuits, vol. 26, No. 4, Apr. 1991, 5 pages.
Satoh et al., “A Novel Gate-Offset NAND Cell (GOC-NAND) Technology Suitable for High-Density and Low-Voltage Operation Flash Memories”, IEDM Technical Digest, Dec. 1999, 6 pages.
Suh et al., “A 3.3 V 32 Mb NAND Flash Memory with Incremental Step Pulse Programming Scheme”, IEEE Journal of Solid-State Circuits, vol. 30, No. 11, Nov. 1995, 8 pages.
Pham et al., “Methods for Active Boosting to Minimize Capacitive Coupling Effect Between Adjacent Gates of Flash Memory Devices”, U.S. Appl. No. 11/319,260, filed Dec. 27, 2005, 34 pages.
Pham et al., “Active Boosting to Minimize Capacitive Coupling Effect Between Adjacent Gates of Flash Memory Devices”, U.S. Appl. No. 11/319,908, filed Dec. 27, 2005, 31 pages.
Oowada, “Self-Boosting Method with Suppression of High Lateral Electric Fields”, U.S. Appl. No. 11/394,460, filed Mar. 30, 2006, 41 pages.
Oowada, “Self-Boosting System with Suppression of High Lateral Electric Fields”, U.S. Appl. No. 11/394,803, filed Mar. 30, 2006, 40 pages.

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