NAND flash memory programming

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C365S185190, C365S185050

Reexamination Certificate

active

07626866

ABSTRACT:
A programming method and memory structure for preventing punch-through in a short channel source-side select gate structure includes adjusting voltages on the selected and unselected bitlines, and the program, pass, and select gate voltages.

REFERENCES:
patent: 4687117 (1987-08-01), Terauds
patent: 6525964 (2003-02-01), Tanaka et al.
patent: 6576513 (2003-06-01), Yim et al.
patent: 6580639 (2003-06-01), He et al.
patent: 6614688 (2003-09-01), Jeong et al.
patent: 6661707 (2003-12-01), Choi et al.
patent: 6930921 (2005-08-01), Matsunaga et al.
patent: 7023733 (2006-04-01), Guterman et al.
patent: 7023740 (2006-04-01), Wong et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

NAND flash memory programming does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with NAND flash memory programming, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and NAND flash memory programming will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-4102959

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.