Static information storage and retrieval – Floating gate – Particular connection
Reexamination Certificate
2006-04-25
2006-04-25
Eckert, George (Department: 2827)
Static information storage and retrieval
Floating gate
Particular connection
C365S185110, C365S230030, C365S230060, C365S016000
Reexamination Certificate
active
07035143
ABSTRACT:
Provided is related to a NAND flash memory device and method of reading the same, in which during a read operation, a ground voltage is applied to string and ground selection transistors of deselected cell blocks so as to increase resistance of a string line to prevent leakage currents due to a back-bias effect. A reduced bitline leakage current increases an ON/OFF current ratio between programmed and erased cells to reduce a sensing time therein, which makes a read trip range so as to prevent variation of threshold voltages due to data retention and reading disturbance. Voltages can be independently applied to source selection lines by electrically isolating source selection transistors between the cell blocks. It is available to reduce the number of source discharge transistors by electrically connecting the source selection transistors between adjacent cell blocks.
REFERENCES:
patent: 5969990 (1999-10-01), Arase
patent: 6731540 (2004-05-01), Lee et al.
patent: 6956769 (2005-10-01), Lee
patent: 2002/0186590 (2002-12-01), Lee
patent: 2004/0080980 (2004-04-01), Lee
patent: 2005/0232012 (2005-10-01), Park
Eckert George
Hynix / Semiconductor Inc.
Marshall & Gerstein & Borun LLP
Tran Anthan
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