NAND flash memory device and method of programming the same

Static information storage and retrieval – Floating gate – Particular connection

Reexamination Certificate

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Details

C365S185120, C365S185170, C365S185250, C365S185280

Reexamination Certificate

active

10888067

ABSTRACT:
Provided is directed to a NAND flash memory device and a method of programming the same, which can improve integration of the device by removing a common source line connecting with a source line coupled to a plurality of cell blocks, control a voltage applied to a source line by each cell block, and rise a precharge level in a channel area by applying a pumping voltage to the source line relatively having low capacitance instead of a bitline having a large capacitance, and as a result of those, the NAND flash memory device can reduce disturbance, use a lower voltage than a power supply voltage on the bitline, which leads to reduce a current consumption.

REFERENCES:
patent: 6738290 (2004-05-01), Lee et al.
patent: 6859394 (2005-02-01), Matsunaga et al.
patent: 6859395 (2005-02-01), Matsunaga et al.
patent: 6859397 (2005-02-01), Lutze et al.
patent: 6956769 (2005-10-01), Lee

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