NAND flash memory and memory system

Static information storage and retrieval – Floating gate – Particular connection

Reexamination Certificate

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C365S185240

Reexamination Certificate

active

07961516

ABSTRACT:
A NAND flash memory comprising blocks which are units of writing and deletion of data, the block comprising: memory cells from which data corresponding to values of held threshold voltages can be read by applying a reading voltage to control gates of the memory cells; source-side selection gate transistors connected between a common source line and the memory cells; drain-side selection gate transistors connected between a bit line and the memory cells; and monitor cells which are configured as the memory cells and have a threshold voltage set according to monitor data, and from which data corresponding to values of held threshold voltages can be read by applying a decision voltage to control gates of the monitor cells.

REFERENCES:
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patent: 7493531 (2009-02-01), Ito et al.
patent: 2003/0033549 (2003-02-01), Liu
patent: 2006/0227611 (2006-10-01), Lee
patent: 2007/0113108 (2007-05-01), Lien
patent: 2007/0263439 (2007-11-01), Cornwell et al.
patent: 2000-173275 (2000-06-01), None
patent: 10-0370909 (2000-10-01), None
patent: 10-2004-0077423 (2004-09-01), None
patent: 10-2007-0010137 (2007-01-01), None
Office Action issued Jun. 25, 2010, in Korean Patent Application No. 10-2008-0122939 (with English-language Translation).
Office Action issued on Jan. 20, 2011 in Korean Patent Application No. 10-2008-0122939 (with English Translation) 5 pages.

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