N well implants to separate blocks in a flash memory device

Details N well implants to separate blocks in a flash memory device N well implants to separate blocks in a flash memory device

2008-10-06

2011-12-27

Phung, Anh (Department: 2824)

Active solid-state devices (e.g., transistors, solid-state diode

Integrated circuit structure with electrically isolated...

With pn junction isolation

C257SE21544, C257S547000, C257S548000

Reexamination Certificate

active

08084843

ABSTRACT:
A semiconductor memory device that has an isolated area formed from one conductivity and formed in part by a buried layer of a second conductivity that is implanted in a substrate. The walls of the isolated area are formed by implants that are formed from the second conductivity and extend down to the buried layer. The isolated region has implanted source lines and is further subdivided by overlay strips of the second conductivity that extend substantially down to the buried layer. Each isolation region can contain one or more blocks of memory cells.

REFERENCES:
patent: 5159427 (1992-10-01), Ogura et al.
patent: 5973366 (1999-10-01), Tada
patent: 6677198 (2004-01-01), Hsu et al.
patent: 6913974 (2005-07-01), Hung et al.
patent: 6914826 (2005-07-01), Hung et al.
patent: 2005/0057966 (2005-03-01), Nazarian

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