N well implants to separate blocks in a flash memory device

Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – With pn junction isolation

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C257S547000, C257S548000

Reexamination Certificate

active

07443009

ABSTRACT:
A semiconductor memory device that has an isolated area formed from one conductivity and formed in part by a buried layer of a second conductivity that is implanted in a substrate. The walls of the isolated area are formed by implants that are formed from the second conductivity and extend down to the buried layer. The isolated region has implanted source lines and is further subdivided by overlay strips of the second conductivity that extend substantially down to the buried layer. Each isolation region can contain one or more blocks of memory cells.

REFERENCES:
patent: 5159427 (1992-10-01), Ogura et al.
patent: 6677198 (2004-01-01), Hsu et al.
patent: 6913974 (2005-07-01), Hung et al.
patent: 6914826 (2005-07-01), Hung et al.
patent: 2005/0057966 (2005-03-01), Nazarian

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

N well implants to separate blocks in a flash memory device does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with N well implants to separate blocks in a flash memory device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and N well implants to separate blocks in a flash memory device will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-4010744

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.