N-ary input to n-1 binary outputs level shift circuit for I.sup.

Details N-ary input to n-1 binary outputs level shift circuit for I.sup. N-ary input to n-1 binary outputs level shift circuit for I.sup.

1984-03-02

1986-05-13

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307454, 307455, 307459, 307473, 307474, 307361, H03K 19092

Patent

active

045889082

ABSTRACT:
A circuit for level adaptation between an I.sup.2 L circuit and a preceding combinatory logic circuit. The input current for the I.sup.2 L circuit is supplied by a direct current source which is connected to several switches which are controlled by the level on the output of the combinatory logic circuit, at least one of the outputs thereof being connected to an input of the I.sup.2 L circuit via a current mirror.

REFERENCES:
patent: 4140920 (1979-02-01), Dao et al.
patent: 4158782 (1979-06-01), Price, Jr.
patent: 4326135 (1982-04-01), Jarrett et al.
patent: 4357548 (1982-11-01), Preslar
patent: 4429234 (1984-01-01), Streit
patent: 4439695 (1984-03-01), Pelletier et al.
patent: 4459496 (1984-07-01), Yamada et al.

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