N+1 bit resolution from an N bit A/D converter

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H03M 112

Patent

active

047332166

ABSTRACT:
In microprocessor based control systems wherein several analog sensors are used to generate control signals of N bits, the system herein generates a digital signal having an N+1 bit resolution of the information. The N+1 bit resolution is generated from an N bit A/D converter by means of a network changing the reference voltage input to the A/D converter by an offset voltage which is a function of the least significant bit position. The network, in the absence of a control signal, generates a first range of reference voltages and in the presence of the control signal generates a second range wherein the limit voltages are changed by the offset voltage. The microprocessor reads and stores each N bit digital word from the same sensor and under the command of the control signal, sums the two digital words and the result is an N+1 bit digital word.

REFERENCES:
patent: 4244004 (1981-01-01), Yamada
patent: 4558303 (1985-12-01), Fielden

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