Multlayer interconnection structure for semiconductor device

Details Multlayer interconnection structure for semiconductor device Multlayer interconnection structure for semiconductor device

1996-06-13

1998-05-26

Thomas, Tom

Active solid-state devices (e.g., transistors, solid-state diode

With means to control surface effects

Insulating coating

257641, 257645, 257752, 257754, 257774, H01L 2258

Patent

active

057570647

ABSTRACT:
A structure for a semiconductor device includes a plurality of memory cell areas, a multilayer interconnection structure including an interfacial insulating film and connecting the plurality of memory cell areas, the multilayer interconnection structure being insulated and planarized by the interfacial insulating film, and peripheral circuits adjacent to the plurality of memory cell areas, the peripheral circuits intersecting at a portion, wherein the multilayer interconnection structure includes an inflow-preventing layer for preventing an inflow of the interfacial insulating film at the portion where the peripheral circuits intersect.

REFERENCES:
patent: 5128744 (1992-07-01), Asano et al.
patent: 5244820 (1993-09-01), Kamata et al.

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