Electrical computers and digital processing systems: processing – Instruction issuing
Reexamination Certificate
2007-01-05
2010-02-09
Chan, Eddie P (Department: 2183)
Electrical computers and digital processing systems: processing
Instruction issuing
C712S215000
Reexamination Certificate
active
07660969
ABSTRACT:
A concurrent instruction dispatch apparatus includes a group indicator for each of a plurality of threads that indicates which one of a plurality of groups of the threads the thread belongs to. A group priority indicator for each group indicates an instruction dispatch priority relative to the other groups. Selection logic selects a thread for dispatching an instruction thereof based on the group and group priority indicators. A bifurcated scheduler includes first scheduler logic that issues instructions of the threads to an execution unit, second scheduler logic that enforces a thread scheduling policy, and an interface. A group indicator indicates which group each thread belongs to, a priority for each group, and execution information for each thread. The first scheduler logic issues the instructions based on the group priorities and group indicators, and the second scheduler logic updates the group indicators based on the instruction execution information.
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Jensen Michael Gottlieb
Kinter Ryan C.
Chan Eddie P
MIPS Technologies Inc.
Sterne Kessler Goldstein & Fox P.L.L.C.
Vicary Keith
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