Multistep vector generation for multiple frame buffer controller

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395509, 395140, G06F 1316

Patent

active

057322481

ABSTRACT:
A method and apparatus is provided for processing vector primitives with interleaved frame buffer controllers. Each frame buffer controller includes an edge stepper, a span stepper, and a pixel processor. Each edge stepper provides pixel data for multiple pixels during each clock cycle. Any pixels not in an area of the display assigned to a frame buffer controller are discarded without further processing. Pixels which are in the areas assigned the frame buffer controller are further processed. Additionally, two vectors may be processed simultaneaously by the edge steppers.

REFERENCES:
patent: 5222204 (1993-06-01), Swanson
patent: 5278949 (1994-01-01), Thayer
patent: 5321805 (1994-06-01), Hayman et al.
IEEE Computer Graphics and Applications, "Pixel Processing in a Memory Controlled" by Donovan et al, Jan. 1995, pp. 51-61.

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