Multistation communication bus system, and a master station and

Multiplex communications – Wide area network – Packet switching

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34082507, H04L 12403

Patent

active

054348625

ABSTRACT:
A multistation communication system accommodates one master station and a plurality of slave stations. The bus has a separate clock signal wire, a separate information bit group wire, and a separate indication signal wire. A first value of the indication signal identifies an actual information bit group as an address, a second value identifies them as data. Each address bit group has control bits next to operational address bits. A slave station may recognize one or more addresses as its own address; the associated control bits will then mandate the transfer direction. Furthermore, the slave station may recognize one particular operational address as an interface reset control signal.

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Meusburger, "1.5 V 1 K-CMOS-RAM with Only 8 Pins", IEEE Journal of Solid State Circuits, vol. SC-16, No. 3, Jun. 1981, pp. 190-194.

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