Multistage pulse width modulator

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Rectangular or pulse waveform width control

Reexamination Certificate

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Details

C327S170000

Reexamination Certificate

active

06784710

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to the field of pulse width modulation and, more particularly, to multistage pulse width modulators.
BACKGROUND OF THE INVENTION
Pulse width modulation circuits (“pulse width modulators”) are utilized in a variety of different applications including digital-to-analog conversion, power supply control, and motor control. For example, pulse width modulators are utilized in digital pulse width modulator power amplifiers for audio amplification. Such devices eliminate the need for an extra digital-to-analog converter and enhance efficiency of the audio amplifier.
In general, the resolution R of a pulse width modulator output signal is determined by the ratio of the pulse width modulator counter clock rate F_CLK to the pulse width modulator output pulse frequency F_PWM. For example, for a two-level modulation scheme, R=(F_CLK/F_PWM)+1. Thus, in order to enhance the resolution of a pulse width modulator output signal for a given output pulse frequency, the pulse width modulator counter clock rate F_CLK needs to be increased.
Increasing the clock rate for the entire pulse width modulator circuit has certain drawbacks. As the clock rate for a circuit increases, the current consumption of the circuit also increases. Increased current consumption is particularly undesirable in applications in which power consumption is a critical operating characteristic. Increased current consumption leads to undesirable circuit heating. Higher circuit clock rates also increase the chance that noise signals will couple to other parts of the circuit, particularly in devices in which the pulse width modulator is part of an integrated circuit. Additionally, increasing the clock rate of a pulse width modulator increases the complexity of the circuit.
Accordingly, the desire and need to have a pulse width modulator design that allows for high resolution operation exist while avoiding some or all of the problems associated with increasing the clock rate of a pulse width modulation circuit.
SUMMARY OF THE INVENTION
Two or more pulse width modulation stages, each having progressively higher resolution, are utilized to allow the lower resolution stage or stages to operate at lower clock speeds. Later stages are operated at higher clock speeds, and thus a smaller portion of the total pulse-width modulation circuit utilizes the higher clock speed. Additionally, later stages operate over smaller time intervals in order to reduce usage of the later stages.
Accordingly, one aspect of the present invention provides an apparatus including a first pulse width modulator stage and a second pulse width modulator stage. The first pulse width modulator stage includes a first comparator operable to receive a first reference signal and a sample signal and to compare the first reference signal to the sample signal. The second pulse width modulator stage is coupled to the first pulse width modulator stage and includes a second comparator operable to receive a second reference signal and the sample signal and to compare the second reference signal to the sample signal.
Another aspect of the present invention provides a method of producing a pulse width modulated signal. A first reference signal is generated. The first reference signal is compared to a sample signal. A first output signal is produced depending on the comparison of the first reference signal to a sample signal. A second reference signal is generated. The second reference signal is compared to the sample signal. A second output signal is produced depending on the comparison of the second reference signal to the sample signal.
The foregoing is a summary and thus contains, by necessity, simplifications, generalizations and omissions of detail; consequently, those skilled in the art will appreciate that the summary is illustrative only and is not intended to be in any way limiting. As will also be apparent to one of skill in the art, the operations disclosed herein may be implemented in a number of ways, and such changes and modifications may be made without departing from this invention and its broader aspects. Other aspects, inventive features, and advantages of the present invention, as defined solely by the claims, will become apparent in the non-limiting detailed description set forth below.


REFERENCES:
patent: 6275403 (2001-08-01), McNulty et al.
patent: 6563377 (2003-05-01), Butler
patent: 6580236 (2003-06-01), Mitsuda
patent: 6611439 (2003-08-01), Yang et al.

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