Amplifiers – With periodic switching input-output
Reexamination Certificate
2001-08-17
2003-05-20
Mottola, Steven J. (Department: 2817)
Amplifiers
With periodic switching input-output
C330S150000
Reexamination Certificate
active
06566942
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a multistage amplifier circuit used inside an analog/digital converter or the like. The invention particularly relates to a multistage amplifier circuit having a plurality of chopper amplifiers connected in multiple stages, for amplifying an input potential difference while resetting each chopper amplifier in a predetermined period.
BACKGROUND OF THE INVENTION
At present, an operational amplifier is manufactured using CMOS processing. The CMOS devices have a gate oxide film which has become thinner in the development of finer line widths in CMOS processing. Based on this, dielectric strength has been lowered, and power source voltage has also been lowered. This kind of operational amplifier can take a large linear input range when the power source voltage has been increased or when the number of vertically piled-up transistors is made smaller. Therefore, the operational amplifier of the type that is operated at a low power source voltage secures a necessary linear input range by minimizing the number of vertically piled-up transistors.
However, in this case, the gain obtained by the operational amplifier is lowered. Therefore, in order to overcome this difficulty, in many cases, the necessary gain is secured by connecting operational amplifiers in multiple stages.
FIG. 5
is a circuit diagram showing one example of a multistage amplifier circuit having these operational amplifiers connected at multi-stages. This multistage amplifier circuit
101
has the signal voltage input terminal
102
for taking in a signal voltage to be amplified, switch
103
for passing a signal voltage applied to the signal voltage input terminal
102
and transferring this signal voltage to a next-stage circuit when the switch is in the ON status, reference voltage input terminal
104
for taking in a reference voltage, switch
105
for passing the reference voltage applied to the reference voltage input terminal
104
and transferring this reference voltage to a next-stage circuit when the switch is in the ON status, and the plural chopper amplifiers
106
a
to
106
n
that are connected at multi-stages, for amplifying a differential voltage between the signal voltage and the reference voltage supplied via the switches
103
and
105
respectively.
For amplifying the differential voltage between the signal voltage and the reference voltage that have been input to the signal voltage input terminal
102
and the reference voltage input terminal
104
respectively, first, switches
107
and
108
that constitute the chopper amplifiers
106
a
to
106
n
respectively are set to the ON status as shown in FIG.
6
A and FIG.
6
B. With this arrangement, an input terminal and an output terminal of each operational amplifier
111
that constitutes each of the chopper amplifiers
106
a
to
106
n
are short-circuited, thereby to self-bias to an optimum DC operation point. Thus, the chopper amplifiers
106
a
to
106
n
are reset (a reset period).
Next, the switches
107
and
108
of the chopper amplifiers
106
a
to
106
n
respectively are set to the OFF status thereby to cancel the reset as shown in FIG.
6
A and FIG.
6
B. At a point of time when the period has been shifted to an amplifying period, a signal voltage applied to the signal voltage input terminal
102
is transferred to the first-stage chopper amplifier
106
a
via the switch
103
that is in the ON status as shown in
FIG. 6A
, FIG.
6
B and FIG.
6
D. Thus, a charge corresponding to the signal voltage is held in capacitors
109
and
110
that constitute each of the first-stage chopper amplifier
106
a
to the n-th stage chopper amplifier
106
n
(a sampling period that constitutes the amplifying period).
Thereafter, the switch
103
is set to the OFF status and the switch
105
is set to the ON status as shown in
FIG. 6A
,
FIG. 6C
, and FIG.
6
D. Thus, a reference voltage input to the reference voltage input terminal
104
is transferred to the first-stage chopper amplifier
106
a
, thereby to adjust the charge of the capacitors
109
and
110
that constitute each of the first-stage chopper amplifier
106
a
to the n-th stage chopper amplifier
106
n.
With the above arrangement, each operational amplifier
111
that constitutes each of the first-stage chopper amplifier
106
a
to the n-th stage chopper amplifier
106
n
amplifies a differential voltage between the signal voltage and the reference voltage held in the capacitors
109
and
110
respectively, as expressed by an equation shown below. As a result, an output voltage not depending on the potential of the signal voltage is obtained based on an optimum DC operation point set during the reset period (the amplifying period).
&Dgr;
V
out
=A
1
·A
2
. . . A
n
·(
V
in
−V
ref
) . . . (1)
where
&Dgr;V
out
: output voltage,
A
1
: amplification factor of the chopper amplifier
106
a,
A
2
: amplification factor of the chopper amplifier
106
b,
A
n
: amplification factor of the chopper amplifier
106
n,
V
in
: signal voltage,
V
ref
: reference voltage.
According to the above conventional multistage amplifier circuit
101
, all the chopper amplifiers
106
a
to
106
n
are reset at the same time, and then these chopper amplifiers carry out an amplification operation at the same time. This operation is repeated to amplify the differential voltage between the signal voltage applied to the signal voltage input terminal
102
and the reference voltage applied to the reference voltage input terminal
104
. Therefore, when the number “n” of the stages from the chopper amplifier
106
a
to the chopper amplifier
106
n
is increased, the operation range becomes smaller. This has had a problem in that it is not possible to achieve a high-speed operation.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a multistage amplifier circuit capable of carrying out a high-speed operation based on a wide operation range even when an amplification factor has been increased by increasing the number of connection stages of unit amplifiers.
It is another object of the present invention to provide a multistage amplifier circuit capable of carrying out a high-speed operation based on a wide operation range even when an amplification factor has been increased by increasing the number of connection stages of unit amplifiers, while decreasing the number of parts used and simplifying a control procedure.
According to one aspect of this invention, in the multistage amplifier circuit having a first-stage chopper amplifier to an n-th stage chopper amplifier connected at multi-stages, for sequentially amplifying an input signal, m (where m<n) coupler/isolators are disposed between the first-stage chopper amplifier and the n-th stage chopper amplifier, and the coupler/isolators couple and isolate the first-stage chopper amplifier to the n-th stage chopper amplifier to sequentially shift a reset timing and an amplification timing of the first-stage chopper amplifier to the n-th stage chopper amplifier, thereby to make the first-stage chopper amplifier to the n-th stage chopper amplifier amplify the input signal in a pipeline format. With the above structure, it is possible to carry out a high-speed operation based on a wide operation range even when the amplification factor has been increased by increasing the number of connection of unit amplifiers at stages from the first-stage chopper amplifier to the n-th stage chopper amplifier.
Other objects and features of this invention will become apparent from the following description with reference to the accompanying drawings.
REFERENCES:
patent: 6262626 (2001-07-01), Bakker et al.
patent: 6333673 (2001-12-01), Dawes
patent: 9-069761 (1997-03-01), None
patent: 9-307413 (1997-11-01), None
patent: 11-8535 (1999-01-01), None
Leydig , Voit & Mayer, Ltd.
Mitsubishi Denki & Kabushiki Kaisha
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