Amplifiers – With semiconductor amplifying device – Including plural stages cascaded
Reexamination Certificate
2002-04-17
2004-06-15
Nguyen, Khanh Van (Department: 2817)
Amplifiers
With semiconductor amplifying device
Including plural stages cascaded
C330S150000
Reexamination Certificate
active
06750724
ABSTRACT:
TECHNICAL FIELD
The present invention relates to a quasilinear multistage amplifier used for satellite communications, terrestrial microwave communications, mobile communications and the like, which satisfies specifications on distortion.
BACKGROUND ART
Multistage amplifiers used for satellite communications, terrestrial microwave communications, mobile communications and the like are generally required to have low distortion, for digital modulation and multicarrier common amplification.
Further, amplifiers, which are among wireless apparatus of largest power consumption, are also required to operate with high efficiency and lower power consumption. Therefore, it is necessary to improve the distortion characteristics of amplifiers by using distortion compensation circuits and make it possible to operate near the saturation region for high-efficiency operation.
FIG. 1
is a block diagram showing a conventional multistage amplifier disclosed, for example, in Japanese Patent Application Laid Open No. 60-157305. In this figure, reference numeral
1
denotes an input terminal, reference numeral
2
denotes a distortion compensation circuit for compensating distortion of an amplifier
3
, reference numeral
3
denotes a single-stage or multistage amplifier, reference numeral
4
denotes an output terminal, reference numeral
5
denotes an amplifier incorporating a bias circuit (hereinafter referred to as “bias-circuit incorporated amplifier) for adjusting the amount of distortion of an input signal, and reference numeral
6
denotes a gallium arsenide (GaAs) field effect transistor (FET) whose idle current is set in a range from 0.1 Idss to 0.75 Idss. Reference sign Idss represents a saturation current of the GaAs FET
6
. Reference numeral
7
denotes an attenuator for adjusting the signal level of the input signal.
Next, an operation will be discussed.
There arises distortion in a signal amplified by the amplifier
3
due to nonlinear gain characteristic (AM-AM characteristic) and phase characteristic (AM-PM characteristic) of the amplifier
3
.
Generally, the AM-AM characteristic of the amplifier
3
is gain reduction with respect to input power or output power and the AM-PM characteristic thereof is phase lead with respect to the input power or output power.
Therefore, if the distortion compensation circuit
2
generates a distortion characteristic reverse to the AM-AM characteristic and AM-PM characteristic of the amplifier
3
, it is possible to compensate the distortion of the input signal.
FIG. 2
is a graph illustrating the dependencies of AM-AM characteristic and AM-PM characteristic on idle currents Ido.
It can be seen from
FIG. 2
that by changing the bias condition from class A to class AB, the phase characteristic changes from phase lead to phase lag with respect to the output power.
In the conventional case, the bias condition is set such that the idle current Ido should be in a range from 0.1 Idss to 0.75 Idss. If the idle current Ido is not more than the upper limit of 0.75 Idss, a characteristic of phase lag with respect to the output power is obtained. On the other hand, if the idle current Ido is not less than the lower limit of 0.1 Idss, almost constant characteristic without gain increase with respect to the output power is obtained.
Therefore, the amplifier
5
incorporating the bias circuit which sets the bias condition such that the idle current Ido should be in the range from 0.1 Idss to 0.75 Idss has the AM-AM characteristic of almost constant gain with respect to the output power and the AM-PM characteristic of phase lag with respect thereto.
Thus, since the distortion compensation circuit
2
which includes the bias-circuit incorporated amplifier
5
has a characteristic of almost constant gain and phase lag with respect to the output power, it can improve only the phase characteristic without deteriorating the gain characteristic of the amplifier
3
under distortion compensation.
Further, since the distortion compensation circuit
2
includes a plurality of bias-circuit incorporated amplifier
5
and attenuators
7
, it is possible to appropriately adjust the characteristic of the distortion compensation circuit
2
to the reverse characteristic of the amplifier
3
.
The conventional multistage amplifier, having the above-discussed constitution, has a problem that the distortion compensation circuit
2
should be disadvantageously upsized as it includes the attenuators
7
and that the gain of the distortion compensation circuit
2
becomes lower. Further, since only the phase characteristic is improved as distortion, it is disadvantageously impossible to achieve a large distortion compensation effect including the gain characteristic.
The present invention has been provided to solve the above problems, and an object of the present invention is to provide a multistage amplifier which can achieve a large distortion compensation effect without upsizing or gain reduction.
DISCLOSURE OF THE INVENTION
In a multistage amplifier of the present invention, a bias condition of at least one amplifier among amplifiers other than a last-stage amplifier is set in consideration of the relation between an idle current and a saturation current.
This produces a large distortion compensation effect without upsizing or gain reduction.
In the multistage amplifier of the present invention, the bias condition of the amplifier is set such that the idle current should be less than a tenth of the saturation current.
This produces a large distortion compensation effect.
In the multistage amplifier of the present invention, the gate width of the amplifier whose bias condition is set such that the idle current should be less than a tenth of the saturation current is set in such a manner that the gate width of the last-stage amplifier and the gate width of the amplifier can satisfy a predetermined condition.
This produces an effect of achieving a multistage amplifier of high efficiency and low distortion.
In the multistage amplifier of the present invention, assuming that the gate width of the last-stage amplifier is Wgn, the gate width of an i-th amplifier whose bias condition is set such that the idle current should be less than a tenth of the saturation current is Wgi, and the gain of an (i+1)-th amplifier through the last-stage amplifier is G, the gate width of the i-th amplifier is so set as to satisfy the following relation:
Wgi
>2.4
×Wgn/G
This produces an effect of improving the efficiency of the multistage amplifier.
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Ikeda Yukio
Mori Kazutomi
Shinjo Shintarou
Mitsubishi Denki & Kabushiki Kaisha
Nguyen Khanh Van
Oblon & Spivak, McClelland, Maier & Neustadt P.C.
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