Multiplex communications – Pathfinding or routing – Through a circuit switch
Reexamination Certificate
2006-04-04
2006-04-04
Qureshi, Afsar (Department: 2667)
Multiplex communications
Pathfinding or routing
Through a circuit switch
C370S412000, C370S422000, C370S395400, C709S238000, C710S038000
Reexamination Certificate
active
07023840
ABSTRACT:
A scheduling system and methodology for use in a network switch element having multiserver, multiple-arbiter architecture. Ingress ports and egress ports coupled to the cross-connect fabric of the network element are provided with multiple ingress and egress arbiters, respectively, for effectuating an iterative arbitration strategy such as RGA or RG. Arbiter architectures include singe-arbiter-per-port; single-arbiter-per-server; multiple-arbiters-per-port; and multiple-arbiters-per-server arrangements, wherein the arbiters can be implemented using RRA, BTA, Flexible Ring, or any other arbiter technology. Depending on the iteration strategy, ingress arbiter architecture and egress arbiter architecture, a variety of iterative, multiserver-capable scheduling algorithms can be obtained, which scheduling algorithms can also be implemented in QoS-aware network nodes.
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Blanton John
Cankaya Hakki Candan
Damm Gerard
Golla Prasad N.
Verchere Dominique
Alcatel
Danamraj & Youst
Hoersten Craig A.
Qureshi Afsar
Sewell V. Lawrence
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