Multiprocessor type time varying image encoding system and image

Details Multiprocessor type time varying image encoding system and image Multiprocessor type time varying image encoding system and image

1992-09-14

1993-08-17

Anderson, Lawrence E.

Boots, shoes, and leggings

395425, 395800, 395725, 3642817, 3642814, 3642428, 36424291, G06F 938, G06F 1316

Patent

active

052376869

ABSTRACT:
A multiprocessor type time varying image encoding system having a plurality of digital signal processor (DSP) modules (DMM's) connected in parallel, each DMM having a DSP, a local memory and an interrupt control unit, a plurality of common memories for storing data which is being processed, parameters, etc., an input frame memory which enables reading and writing operations to be executed asynchronously, a combination of a task control unit and a task table for distributing tasks to the DMM's, a plurality of independent common buses, and a combination of a bus control unit and a bus control table for bus sharing control.

REFERENCES:
Tokumichi Murakami, Koh Kamizawa, Masatoshi Kameyama, and Shinichi Nakagawa, A DSP Architectural Design for Low Bit-Rate Motion Video Codec, Oct. 1989, pp. 1267-1274, IEEE Transactions on Circuits and Systems, vol. 36, No. 10.
Tokumichi Murakami, Koh Kamizawa, Masatoshi Kameyama, Shinichi Nakagawa, A DSP Architecture for 64KBPS Motion Video Codec, 1988, pp. 227-230 ISCAS.

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